Bradley C. Aldrich

A 333-MHz dual-MAC DSP architecture for next-generation wireless applications

We introduce the first DSP core developed at the Analog Devices and Intel Joint DSP Development Center. The 16-bit fixed-point core combines some of the best features of traditional DSPs and micro-controllers and compares favorably with dual-MAC DSPs on DSP specific benchmarks and with micro-controllers on micro-controller specific benchmarks. In addition, the core supports a rich set of alignment independent packed byte instructions to enable an efficient implementation of 3G algorithms in next-generation wireless applications. The deep and fully interlocked pipeline allows the core to run at 333-MHz in the 0.18-/spl mu/m TSMC process.

Accelerating Mobile Video: A 64-Bit SIMD Architecture for Handheld Applications

Providing quality mobile video applications in hand-held mobile devices requires increased computational capability. Using Single Instruction Multiple Data (SIMD) techniques to expose and accelerate the data parallelism inherent in video processing increases performance in handheld and wireless systems. The paper introduces a new 64-bit SIMD coprocessor of the Intel® XScale® microarchitecture which is optimized for low-power handheld applications. The architecture blends the SIMD media processing style with the capabilities of the XScale microarchitecture. This paper provides an overview of the architecture, its instruction set, programming model, the pipeline organization and functional units. The paper also describes how key features of architecture improve the performance of video applications as compared to a scalar implementation. The performance and power improvements based upon measured results are analyzed to show how the opportunities of power savings by reducing the frequency and voltage can be realized.

Accelerating Mobile Multimedia with Intel Wireless MMX Technology

Demand for mobile video applications is growing today in wireless handheld platforms. Intel/spl reg/ Wireless MMX/spl trade/ technology has been designed to accelerate mobile multimedia and applications processing in a power efficient manner. Optimizing instruction set architecture is a logical approach towards attaining higher performance in multimedia applications. Wireless MMX technology is a 64-bit single instruction multiple data, (SIMD), coprocessor for the Intel/spl reg/ Xscale/spl reg/ microarchitecture. This paper provides an overview of Wireless MMX technology and the key features of the architecture that specifically enhance the multimedia performance. Tools and techniques for optimization are also described.

Intel/spl reg/ wireless MMXTM technology: a 64-bit SIMD architecture for mobile multimedia

The growing demand for multimedia rich applications in the wireless mobile domain challenges the capabilities of current wireless handheld devices. Optimizing instruction set architecture is a logical approach towards attaining higher performance in multimedia applications. Intel/spl reg/ wireless MMXTM technology is a 64-bit single instruction multiple data, (SIMD), coprocessor for the Intel/spl reg/ XScale/spl trade/ microarchitecture. It accelerates multimedia applications in handheld and wireless devices by taking advantage of the inherent parallelism and data types of targeted applications. This paper provides an overview of the wireless MMX architecture, its instruction set, pipeline organization, and functional units. Initial benchmark results measured on silicon are also presented.

Optimizing mobile multimedia using SIMD techniques

Demand for mobile video applications is growing today in wireless handheld platforms. Optimizing instruction set architectures and employing SIMD techniques is a logical approach towards attaining higher performance in mobile multimedia applications. Intel® Wireless MMX™ technology has been designed to accelerate mobile multimedia and applications processing in a power efficient manner. This paper provides an overview of Intel® Wireless MMX™ technology, a 64-bit Single Instruction Multiple Data (SIMD) coprocessor for the Intel® XScale® microarchitecture, and the key features of the architecture that specifically enhance the multi-media performance. Tools and techniques for optimization are also described.

Accelerating mobile video applications using Intel/sup /spl reg// Wireless MMX/spl trade/ technology

Demand for mobile video applications is growing today in wireless handheld platforms. Intel/sup /spl reg// Wireless MMX/spl trade/ technology has been designed to accelerate video applications by using single instruction multiple data (SIMD) techniques to expose and accelerate the data parallelism inherent in video processing. Intel Wireless MMX technology is a 64-bit SIMD coprocessor of the Intel XScale/spl trade/ microarchitecture which is optimized for low-power handheld applications. The paper provides an overview of the Wireless MMX technology architecture, its instruction set, pipeline organization and functional units. It also provides analysis of the features of the architecture that specifically enhance the video performance. Initial measured performance results are also provided.