Brandon Rumberg

Hibernets: Energy-Efficient Sensor Networks Using Analog Signal Processing

Preprocessing of data before transmission is recommended for many sensor network applications to reduce communication and improve energy efficiency. However, constraints on memory, speed, and energy currently limit the processing capabilities within a sensor network. In this paper, we describe how ultra-low-power analog circuitry can be integrated with sensor nodes to create energy-efficient sensor networks. To demonstrate this concept, we present a custom analog front-end which performs spectral analysis at a fraction of the power used by a digital counterpart. Furthermore, we show that the front-end can be combined with existing sensor nodes to 1) selectively wake up the mote based upon spectral content of the signal, thus increasing battery life without missing interesting events, and to 2) achieve low-power signal analysis using an analog spectral decomposition block, freeing up digital computation resources for higher-level analysis. Experiments in the context of vehicle classification show improved performance for our ASP-interfaced mote over an all-digital implementation.

A Low-Power Magnitude Detector for Analysis of Transient-Rich Signals

Magnitude detection, such as envelope detection or RMS estimation, is needed for many low-power signal-analysis applications. In such applications, the temporal accuracy of the magnitude detector is as important as its amplitude accuracy. We present a low-power audio-frequency magnitude detector that simultaneously achieves both high temporal accuracy and high amplitude accuracy. This performance is achieved by rectifying the signal with a high-ripple peak detector and then averaging this rectified signal with an adaptive-time-constant filter. The time constant of this filter decreases with increasing amplitude, enabling the filter to quickly respond on a short time scale to transients, while steady-state ripple is averaged on a longer time scale. The circuit has been fabricated in a 0.18 μm CMOS process and consumes only 1.1 nW-1.08 μW when tuned for operation from 20 Hz-20 kHz. It exhibits a dynamic range of 70 dB across typical speech frequencies.

A Low-Power and High-Precision Programmable Analog Filter Bank

Analog filter banks befit remote audio- and vibration-sensing applications, which require frequency analysis to be performed with low-power consumption and with moderate-to-high precision. The precision of a filter bank depends on both the signal-path precision (i.e., dynamic range) and also the parameter precision (e.g., accuracy of the center frequencies). This brief presents a new bandpass filter for audio-frequency filter banks and provides a procedure for designing this filter. The filter is used in a 16-channel filter bank which has been fabricated in a 0.35- CMOS process. This filter bank has a dynamic range exceeding 62 dB and consumes only 63.6 when biased for speech frequencies. The filter banks parameters are set via floating-gate current sources. This brief shows how to use these floating gates to obtain a versatile filter bank that can be precisely reprogrammed to arbitrary filter spacings and frequency weightings, with a parameter accuracy exceeding 99%.

Hibernets: energy-efficient sensor networks using analog signal processing

In-network processing is recommended for many sensor network applications to reduce communication and improve energy efficiency. However, constraints on memory, speed, and energy currently limit the processing capabilities within a sensor network. In this paper, we describe how ultra-low-power analog circuitry can be integrated with sensor nodes to create energy-efficient sensor networks. We present a custom analog front-end which performs spectral analysis at a fraction of the power used by a digital counterpart. We then show that the front-end can be combined with existing sensor nodes to (1) selectively wake up the mote based upon spectral content of the signal, thus increasing battery life without missing interesting events, and to (2) achieve low-power signal analysis using an analog spectral decomposition block, freeing up digital computation resources for higher-level analysis.

A floating-gate memory cell for continuous-time programming

As an apt choice for long-term analog memory in standard CMOS processes, floating-gate transistors are key enablers for large-scale programmable analog systems. Such systems are often designed for battery-powered-and generally resource-constrained-applications, which require the memory cells to program quickly with low infrastructural overhead. In order to meet these needs, we present a new analog floating-gate memory cell. Our four-transistor memory cell offers both voltage and current outputs and has linear injection and tunneling characteristics. Furthermore, we present a simple programming circuit that forces the memory cell to converge to voltage targets within 100ms and with 8-bit accuracy.

RAMP: accelerating wireless sensor hardware design with a reconfigurable analog/mixed-signal platform

The requirements of many wireless sensing applications approach, or even exceed, the limited hardware capabilities of energy-constrained sensing platforms. To achieve such demanding requirements, some sensing platforms have included low-power application-specific hardware---at the expense of generality---to pre-process the sensor data for reduction to only the relevant information. While this additional hardware can save power by reducing the activity of the microcontroller and radio, a unique hardware solution is required for each application, which presents an unrealistic burden in terms of design time, cost, and ease of integration. To diminish these burdens, we present a reconfigurable analog/mixed-signal sensing platform in this work. At the hardware-level, this platform consists of a reconfigurable integrated circuit containing many commonly used signal-processing blocks and circuit components that can be connected in any configuration. At the software level, this platform provides a framework for abstracting this underlying hardware. We demonstrate how to quickly develop new applications on this platform, ranging from standard sensor interfacing techniques to more complicated intelligent pre-processing and wake-up detection. We also demonstrate how to integrate this platform with commonly used wireless sensor nodes and embedded-system platforms.

A low-power field-programmable analog array for wireless sensing

We present a field-programmable analog array (FPAA) for sensor interfacing and information extraction in wireless, resource-constrained applications. Ultra-low-power operation is achieved through low-overhead reprogramming and an efficient processing architecture. We demonstrate reconfigurability and performance through the synthesis of a temperature sensor, heart-rate alarm, and audio spectrum normalizer, which have measured full-system power consumptions of 12μW, 20μW, and 17.25μW, respectively.

Reconfigurable analog signal processing for wireless sensor networks

The limited power budgets of sensor networks necessitate in-network pre-processing to reduce communication overhead. The low power consumption of analog signal processing (ASP) is well-suited for this task. However, adoption of ASP is restrained by the longer design time relative to reconfigurable/reprogrammable digital processing. Our solution is to enable ASP reconfiguration through the use of a field-programmable analog array (FPAA), which allows wireless sensor network developers to rapidly prototype and test ASP designs. In this paper, we present an FPAA designed for use in wireless sensor networks, and we describe its incorporation and use within a sensor node.

An ultra-low-power analog memory system with an adaptive sampling rate

Sleep states are used in resource-constrained systems to conserve power, but they necessitate a wake-up circuit for detecting unpredictable events. In such systems, all information preceding a wake-up event will be forfeited. In this paper, we present an analog memory system that adaptively samples and records an input signal while the rest of the system sleeps, thereby preserving the information that would otherwise be lost. This system does so while consuming less than 3.52 μW. We also show how the adaptive sampling rate can be utilized to approximate the original signal using a minimal number of samples.

Reconfiguration costs in analog sensor interfaces for wireless sensing applications

Analog sensor interfaces are used in wireless sensor nodes to perform sensor conditioning, event detection, and data reduction. The use of reconfigurable interfaces will enable applications developers to customize these sensor interfaces and to reconfigure them in the field. In this paper, we examine the energy cost of reconfiguring analog circuitry and how the requirements of wireless sensor nodes impact the design of reconfigurable analog systems.