Brian W. Unger

Scheduling critical channels in conservative parallel discrete event simulation

This paper introduces the Critical Channel Traversing (CCT) algorithm, a new scheduling algorithm for both sequential and parallel discrete event simulation. CCT is a general conservative algorithm that is aimed at the simulation of low-granularity network models on shared-memory multiprocessor computers. An implementation of the CCT algorithm within a kernel called TasKit has demonstrated excellent performance for large ATM network simulations when compared to previous sequential, optimistic and conservative kernels. TasKit has achieved two to three times speedup on a single processor with respect to a splay tree central-event-list based sequential kernel. On a 16 processor (R8000) Silicon Graphics PowerChallenge, TasKit has achieved an event-rate of 1.2 million events per second and a speedup of 26 relative to the sequential kernel for a large ATM network model. Performance is achieved through a multi-level scheduling scheme that supports the scheduling of large grains of computation even with low-granularity events. Performance is also enhanced by supporting good cache behavior and automatic load balancing. The paper describes the algorithm and its motivation, proves its correctness and briefly presents performance results for TasKit.

Hybrid packet/fluid flow network simulation

Packet level discrete event network simulators use an event to model the movement of each packet in the network. This results in accurate models, but requires that many events are executed to simulate large, high bandwidth networks. Fluid-based network simulators abstract the model to consider only changes in rates of traffic flows. This can result in large performance advantages, though information about the individual packets is lost making this approach inappropriate for many simulation and emulation studies. We present a hybrid model in which packet flows and fluid flows coexist and interact. This enables studies to be performed with background traffic modelled using fluid flows and foreground traffic modelled at the packet level. Results presented show up to 20 times speedup using this technique. Accuracy is within 4% for latency and 15% for jitter in many cases.

Applying parallel discrete event simulation to network emulation

The simulation of wide area computer networks is one area where the benefits of parallel simulation have been clearly demonstrated. We present a description of a system that uses a parallel discrete event simulator to act as a high speed network emulator. With this, real Internet Protocol (IP) traffic generated by application programs running on user workstations can interact with modelled traffic in the emulator thus providing a controlled test environment for distributed applications. The network emulator uses the TasKit conservative parallel discrete event simulation (PDES) kernel. TasKit has been shown to be able to achieve improved parallel performance over existing conservative and optimistic PDES kernels, as well as improved sequential performance over an existing central-event-list based kernel. This paper explains the modifications that have been made to TasKit to enable real-time operation along with the emulator interface that allows the IP network simulation running in the TasKit kernel to interact with real IP clients. Initial emulator performance data is included.

SimKit: a high performance logical process simulation class library in C++

SimKit is a C++ class library that is designed for fast discrete event simulation. SimKit presents a simple, elegant logical process view of simulation enabling both sequential and parallel execution without code changes to application models. The sequential executive performs well on a variety of UNIX platforms and facilitates debugging and testing. The parallel executive (WarpKit) is based on the Time Warp paradigm and supports efficient parallel execution on shared memory multiprocessor hardware such as the Silicon Graphics Power Challenge and the Sun SparcServer 1000/2000. This paper describes the design features of the SimKit system. A brief overview of the logical process modeling view commonly used in parallel discrete event simulation (PDES) is presented. The SimKit classes are then introduced followed by a brief tutorial on how to build and simulate object oriented models using SimKit.

Towards scalable network emulation

The Internet protocol traffic and network emulator (IP-TNE) enables real hosts and a real network to interact with a virtual network. It combines a real-time network simulator with a mechanism to capture packets from and write packets to a real network. Packets generated by external hosts interact with synthetic traffic within the virtual network, providing a controlled environment for testing real Internet applications. IP-TNE can also generate simulated traffic internally enabling its use as a sophisticated workload generator for stress testing real Web servers. This paper focuses on two issues related to the scalability of network emulators, such as IP-TNE. The scalability of the virtual network within the emulator and the scalability of the real-time I/O interface used to interoperate with the physical network. For the scalability of the virtual network, parallel discrete event simulation techniques are employed. The scalability of the real-time interfaces requires handling varying amounts of network I/O and mapping packets into the simulator efficiently.

State saving for interactive optimistic simulation

Time Warps optimistic scheduling requires the maintenance of simulation state history to support rollback in the event of causality violations. State history, and the ability to rollback the simulation, can provide unique functionality for human-in-the-loop simulation environments. This paper investigates the use of Time Warp to output valid simulation state in a near real-time manner, re-execute portions of the simulation, and interactively probe simulation values to ascertain underlying causes of transient behavior.A shared-memory, multi-threaded interactive simulation architecture is presented and the additional state saving requirements imposed by interactivity are examined. The shortcomings of existing state saving schemes lead us to propose Multiplexed State Saving (MSS). By interleaving checkpointing and incremental state logs MSS provides bounded rollback costs and asynchronous access to prior simulation state. The interaction algorithms and MSS form a scalable, bounded cost component suitable for use in a real-time interactive Time Warp system.

An external state management system for optimistic parallel simulation

This paper presents an overview of an external state management system that has been designed and developed as part of Jades implementation of Time Warp. The saving of state information can be a serious overhead for optimistic synchronization mechanisms. This can become particularly relevant on the critical path of a parallel simulation. One optimization possible when processes have large states is to limit state saving to those parts that change at a given event. A backtrail of state changes is maintained instead of making full state copies to support rollback. An approach to this optimization, called demand state saving (DSS) has been implemented within Jades external state management system (ESM). ESM enables building custom state managers, such as DSS, for different types of state information. These state managers reside outside of the Time Warp executive making it easier to develop and utilize alternative state management schemes. Both ESM and DSS are described in this paper. A rough analysis that compares DSS with copy state saving suggests that in the worst case, DSS will be superior when the fraction of state modified at an event is less than 20% of the total state.

A parallel discrete event IP network emulator

Testing distributed applications over the Internet is fraught with problems: due to the inability to control a wide area network consistent, reproducible performance experiments are not possible. A system is described that uses a parallel discrete event simulator that can act as a real-time network emulator. Real Internet Protocol (IP) traffic generated by application programs running on user workstations can interact with modelled traffic in the emulator; thus providing a controlled test environment for distributed applications. Parallel execution enables the emulator to simulate large virtual networks and to model traffic interactions that could not be done in real-time sequentially. This paper gives an overview of the emulator and explores the various external data routing methods that the emulator supports. These routing methods allow the emulator to be operated in shared environments with certain constraints, as well as in dedicated test environments. Preliminary performance results are included.

A high fidelity ATM traffic and network simulator

The design of an ATM traffic and network (ATM-TN) simulator which characterizes cell level network behavior is presented. The simulator incorporates three classes of ATM traffic source models: an aggregate ethernet model, an MPEG model and a World Wide Webb transactions model. Six classes of ATM switch architectures are modeled including output buffered, shared memory buffered and cross bar switch models, and then multistage switches which can be built from these three basic models. The ATM-TN simulator can be used to characterize arbitrary ATM networks with dynamic multimedia traffic loads. Call set up and tear down via ATM signaling is implemented in addition to the various types of cell traffic streams generated by voice, video and data. The simulator is built on a simple, efficient simulation language called SimKit which is capable of supporting both fast sequential and parallel execution. Parallel execution is supported using WarpKit, an optimistically synchronized kernel that is aimed at shared memory multiprocessor platforms such as the Silicon Graphics Powerchallenge and Sun Spare 1000 series machines. The paper outlines general requirements for ATM traffic and network simulation, presents an ATM-TN simulator architecture, describes its major components and discusses the major issues associated with cell level ATM modeling and simulation.

Programming languages for computer system simulation

This paper describes the programming language facil ities required to simulate computer systems. The systems considered include large multiprocessor, virtual memory computing systems, and networks of these systems. The models considered range from those which only roughly describe system resources to those which fully describe all user and system software. The complex models at the latter level require powerful language facilities which promote program modularity. These basic language facilities include list processing and programmer-definable data structures and data types. The relevant features of the following languages are considered: the general- purpose languages FORTRAN, ALGOL 60, PL/I, ALGOL 68, SIMULA 67, and PASCAL; the general-purpose simulation languages SIMSCRIPT II, GPSS V, GASP, and SPURT 70; the computer simulation languages CSS, OSSL, ECSS, ASPOL, PSML, and CREAM; and the system implementation languages CONCURRENT PASCAL, CLU, ALPHARD, MODULA, and EUCLID. Of these languages only SIMULA 67 and the system implementation languages provide the basic facilities. These features are also useful in the implementation of any large, complex model, particu larly when programming effort must be minimized.