Bruce J. Anderson

Accommodating memory latency in a low-cost rasterizer

This paper describes design tradeoffs in a very low cost rasterrr: digitnl~lmrd copies ofnll or pa11 oftlk mntwi~l for pcnollal or r’lan\room ~1: ic grmtcd wilhout I& providsd Ihnt the copis are 1101 lllndc or dislrihtcd Ibr pralil or commtrcinl advantage. (111: cop)‘riglit c we merely wish to examine the performance of this type of design. In the following sections, we review some of the more common raster&r design approaches, including two new low-cost ones, delve into a more detailed discussion of matching rasterizer processing latency to off-chip memory latency, pursue this design approach with an extremely low-cost rasterizer example, and finish with simulation results which illustrate the effectiveness of the technique. (To be clear, our definition of extremely low cost means a combination of graphics processor and memory costing in the low tens of dollars.) While the performance benefits of matched latencies for best case geometry may be obvious on paper, we have found it useful to simulate the example raster&r to see how badly performance degrades for less than optimal geometry. 2. The Memory Interface Bottleneck DRAM access is a bottleneck in graphics system design. The effects of limited memory bandwidth and ways to overcome it have been discussed previously [IO]. However, the limitations imposed by memory latency have not been widely described. A fundamental limitation of current designs stems from choice of algorithm. Almost all polygon image generators support the zbuffer visibility algorithm. This requires that data representing a single pixel be read from memory, processed, and then conditionally written. Because of latency in memory accesses, data read from the z-buffer is not immediately available to the display processor. Contention for memory further aggravates the latency problem. While the alternative of back-to-front pre-sorting of polygons can avoid the overhead of memory read latency suffered by the zbuffer visibility test, pre-sorting has its own overhead. Furthermore, it is hard to resist employing translucency effects which are enabled by the drawing in back-to-front order. Like the z-buffer algorithm, translucency effects require a read before write and share the latency problem with the z-buffer. For a number of years, the trend in the design of image generators has been to gain greater performance through the use