Burt Fowler

Integrated One Diode–One Resistor Architecture in Nanopillar SiOx Resistive Switching Memory by Nanosphere Lithography

We report on a highly compact, one diode-one resistor (1D-1R) nanopillar device architecture for SiOx-based ReRAM fabricated using nanosphere lithography (NSL). The intrinsic SiOx-based resistive switching element and Si diode are self-aligned on an epitaxial silicon wafer using NSL and a deep-Si-etch process without conventional photolithography. AC-pulse response in 50 ns regime, multibit operation, and good reliability are demonstrated. The NSL process provides a fast and economical approach to large-scale patterning of high-density 1D-1R ReRAM with good potential for use in future applications.

Understanding the resistive switching characteristics and mechanism in active SiOx-based resistive switching memory

The resistive switching characteristics and mechanism in active SiOx-based resistive switching memory have been investigated by using a simple TaN/SiO2/n++ Si-substrate test structure. Controlling the oxygen content in SiOx layer not only improved device yield but also stabilized electrical switching characteristics. The current transport behavior in high- and low-resistance states, thickness effect in SiOx layer, device area effect, and multilevel effect by controlling compliance current limitation and stopped voltage values have been studied. The results indicate that resistive switching occurs in a localized region along a filament, rather than uniformly throughout the bulk. A general current flow model for nonpolar SiOx-based resistive switching memory has been proposed, which provides a simple physical concept to describe the resistive switching behavior and provides additional insights into optimization of resistive switching memory devices.

Intrinsic SiOx-based unipolar resistive switching memory. I. Oxide stoichiometry effects on reversible switching and program window optimization

The physical mechanisms of unipolar resistive switching (RS) in SiOx-based resistive memory are investigated using TaN/SiOx/n++Si and TiW/SiOx/TiW device structures. RS is independent of SiOx thickness and device area, confirming that RS occurs in a localized region along a filamentary pathway. Results from experiments varying electrode type, series resistance, and the oxygen content of SiOxNy materials show the potential to optimize switching performance and control device programming window. Device materials with stoichiometry near that of SiO2 are found to have better operating stability as compared to extrinsic, N-doped SiOxNy materials. The results provide further insight into the physical mechanisms of unipolar operation and lead to a localized switching model based on electrochemical transitions involving common SiOx defects. High-temperature data retention measurements for over 104 s in high- and low-resistance states demonstrate the potential for use of intrinsic SiOx RS devices in future nonvola...

Demonstration of Synaptic Behaviors and Resistive Switching Characterizations by Proton Exchange Reactions in Silicon Oxide.

We realize a device with biological synaptic behaviors by integrating silicon oxide (SiOx) resistive switching memory with Si diodes. Minimal synaptic power consumption due to sneak-path current is achieved and the capability for spike-induced synaptic behaviors is demonstrated, representing critical milestones for the use of SiO2–based materials in future neuromorphic computing applications. Biological synaptic behaviors such as long-term potentiation (LTP), long-term depression (LTD) and spike-timing dependent plasticity (STDP) are demonstrated systematically using a comprehensive analysis of spike-induced waveforms, and represent interesting potential applications for SiOx-based resistive switching materials. The resistive switching SET transition is modeled as hydrogen (proton) release from (SiH)2 to generate the hydrogen bridge defect, and the RESET transition is modeled as an electrochemical reaction (proton capture) that re-forms (SiH)2. The experimental results suggest a simple, robust approach to realize programmable neuromorphic chips compatible with large-scale CMOS manufacturing technology.

Study of polarity effect in SiOx-based resistive switching memory

The SiOx-based resistive switching memory was realized by a simple TaN/SiO2/n++ Si-substrate structure. Post-deposition annealing treatment not only reduced operational variation but also stabilized electrical reliability during repeated switching. The relationship between applied voltage polarity and reset switching parameters is investigated and may indicate that resistive switching occurs at the cathode side. Oxygen-vacancy clustering and asymmetrical thermal-dissipation of the electrodes are discussed as possible causes for the polarity dependence of reset switching parameters. Data retention in high- and low-resistance states was measured for over 104 s, indicating promising potential for future nonvolatile memory applications.

Memory switching properties of e-beam evaporated SiOx on N++ Si substrate

The resistive switching between high impedance (“off” state) and low impedance (“on” state) is demonstrated on e-beam evaporated SiOx/Si resistive random access memory devices in this paper. The set and reset voltages are independent of the device perimeters and oxide thicknesses after electroforming. A circuit model including filament conductance G is proposed to explain the measured “on” state capacitances under frequency ranges from 1 KHz to 1 MHz. The electrochemical redox process is adopted to explain the formation of Si filament during electroforming and switching. “On” and “off” currents were also measured at various operating temperatures. It is found that both set and reset voltages increase as temperature decreases and that no electroforming is exhibited at low temperature T = 77 K.

Oxygen-induced bi-modal failure phenomenon in SiOx-based resistive switching memory

The ambient gas effect in SiOx-based resistive switching memory has been studied. After the electroforming process, resistive switching behavior functions in vacuum as well as in nitrogen without dramatic degradation. However, introducing an oxygen-nitrogen ambient suppresses resistive switching behavior at pressures above 1 Torr. Resistive switching is fully reestablished in oxygen-exposed devices after a vacuum recovery step. The failure phenomena can be described by Monte Carlo simulation using bi-modal statistics to enable feature distribution modeling of failure modes. Design criteria and guidelines are identified for packaging of future oxygen-sensor and of nonvolatile memory applications.

Tristate Operation in Resistive Switching of

The effects of incorporating a thin silicon layer into a SiO2-based resistive-switching random access memory are presented. An improved performance, including a lower electroforming voltage and a more stable device current in the high-resistance programmed state, has been achieved by physical vapor deposition of a thin silicon layer onto the sidewall region of the device. Tristate pulse endurance performance over 106 cycles has been demonstrated. The programmed data show immunity to read disturb testing at 1 V and can be sustained up to 150°C thermal exposure. It is concluded that the improved performance is due to formation of a more robust and more uniform conducting filament. As a result of this advantage, stable tristate programming can be realized in the SiO2-based resistive memory device.

\hbox{SiO}_{2}

Switching characteristics of edge and bulk device structures and an unusual backward-scan effect are investigated in SiOx-based resistive memory. Adding external resistance is found to dramatically affect reset voltage, providing insight into the unique unipolar operation. Non-edge, bulk SiOx-based devices allow flexibility in the fabrication process and hydrogen incorporation improves electroforming and device yield. A backward-scan phenomenon is examined by investigating the DC and AC pulse responses, which defines requirements for ON and OFF programming duration. Circuit-level simulation using a Verilog-A model aids device characterization and programming strategy development for future nonvolatile memory applications.

Thin Films

Electroforming and resistive switching in SiO2 materials are investigated by controlling the annealing temperature, etching time and operating ambient. Thermal anneal in reducing ambient lowers electroforming voltage to 10 nm from the electrode edge in devices with continuous SiO2 layers. Switching unpassivated devices fails in 1 atm air and pure O2/N2, with the recovery of vacuum switching at ∼4.6 V after switching attempts in O2/N2 and at ∼9.5 V after switching attempts in air. Incorporating a hermetic passivation layer enables switching in 1 atm air. Discussions of defect energetics and electrochemical reactions lead to a localized switching model describing device switching dynamics. Low-frequency noise data are consistent with charge transport through electron-trapping defects. Low-resistance-state current for <1.5 V bias is modeled by hopping conduction. A current “overshoot” phenomenon with threshold near 1.6 V is modeled as electron tunneling. Results demonstrate that SiO2-based resistive memory devices provide a good experimental platform to study SiO2 defects. The described electroforming methods and operating models may aid development of future SiO2-based resistive memory products.