C. Cavicchioli

Monolithic active pixel sensor development for the upgrade of the ALICE inner tracking system

ALICE plans an upgrade of its Inner Tracking System for 2018. The development of a monolithic active pixel sensor for this upgrade is described. The TowerJazz 180 nm CMOS imaging sensor process has been chosen as it is possible to use full CMOS in the pixel due to the offering of a deep pwell and also to use different starting materials. The ALPIDE development is an alternative to approaches based on a rolling shutter architecture, and aims to reduce power consumption and integration time by an order of magnitude below the ALICE specifications, which would be quite beneficial in terms of material budget and background. The approach is based on an in-pixel binary front-end combined with a hit-driven architecture. Several prototypes have already been designed, submitted for fabrication and some of them tested with X-ray sources and particles in a beam. Analog power consumption has been limited by optimizing the Q/C of the sensor using Explorer chips. Promising but preliminary first results have also been obtained with a prototype ALPIDE. Radiation tolerance up to the ALICE requirements has also been verified.

Radiation hardness and detector performance of new 180nm CMOS MAPS prototype test structures developed for the upgrade of the ALICE Inner Tracking System

The features of the 180nm TowerJazz1 CMOS technology allow for the first time the use of CMOS Monolithic Active Pixel Sensors (MAPS) under the harsh operational conditions of the LHC experiments. The stringent requirements of the ALICE Inner Tracking System (ITS) in terms of material budget, radiation hardness, readout speed and a low power consumption have thus lead to the choice of MAPS as baseline technology option for the recently approved upgrade of the ITS and are the key drivers for R&D efforts on basic transistor and Explorer and MIMOSA pixel sensor prototypes produced in TowerJazz technology. Though the radiation loads expected for the ITS are below those of ATLAS and CMS, it is however necessary to assess the radiation hardness for ITS MAPS prototypes. Total Ionizing Dose (TID) radiation hardness has been established for basic transistor structures using a 60keV X-ray machine. The main operational characteristics and detection properties such as noise, charge collection efficiency and signal over noise ratio of Explorer-0 and MIMOSA32 and MIMOSA34 pixel sensor prototypes have been studied using X-rays (55Fe) and test beams at CERN and DESY before and after Non Ionizing Energy Loss (NIEL) and TID irradiation. In this paper the results of these R&D activities will be presented and discussed.

MAPS development for the ALICE ITS upgrade

Monolithic Active Pixel Sensors (MAPS) offer the possibility to build pixel detectors and tracking layers with high spatial resolution and low material budget in commercial CMOS processes. Significant progress has been made in the field of MAPS in recent years, and they are now considered for the upgrades of the LHC experiments. This contribution will focus on MAPS detectors developed for the ALICE Inner Tracking System (ITS) upgrade and manufactured in the TowerJazz 180 nm CMOS imaging sensor process on wafers with a high resistivity epitaxial layer. Several sensor chip prototypes have been developed and produced to optimise both charge collection and readout circuitry. The chips have been characterised using electrical measurements, radioactive sources and particle beams. The tests indicate that the sensors satisfy the ALICE requirements and first prototypes with the final size of 1.5 × 3 cm2 have been produced in the first half of 2014. This contribution summarises the characterisation measurements and presents first results from the full-scale chips.

The ALICE Silicon Pixel Detector: readiness for the first proton beam

The Silicon Pixel Detector (SPD) is the innermost element of the ALICE Inner Tracking System (ITS). The SPD consists of two barrel layers of hybrid silicon pixels surrounding the beam pipe with a total of ≈ 107 pixel cells. The SPD features a very low material budget, a 99.9% efficient bidimensional digital response, a 12 μm spatial precision in the bending plane (r) and a prompt signal as input to the L0 trigger. The SPD commissioning in the ALICE experimental area is well advanced and it includes calibration runs with internal pulse and cosmic ray runs. In this contribution the commissioning of the SPD is reviewed and the first results from runs with cosmic rays and circulating proton beams are presented.

Front end optimization for the monolithic active pixel sensor of the ALICE Inner Tracking System upgrade

ALICE plans to replace its Inner Tracking System during the second long shut down of the LHC in 2019 with a new 10 m2 tracker constructed entirely with monolithic active pixel sensors. The TowerJazz 180 nm CMOS imaging Sensor process has been selected to produce the sensor as it offers a deep pwell allowing full CMOS in-pixel circuitry and different starting materials. First full-scale prototypes have been fabricated and tested. Radiation tolerance has also been verified. In this paper the development of the charge sensitive front end and in particular its optimization for uniformity of charge threshold and time response will be presented.

Calibration of the Prompt L0 Trigger of the Silicon Pixel Detector for the ALICE Experiment

The ALICE Silicon Pixel Detector (SPD) is the innermost detector of the ALICE experiment at LHC. It includes 1200 front-end chips, with a total of ~10 pixel channels. The pixel size is 50 x 425 μm. Each front-end chip transmits a Fast-OR signal upon registration of at least one hit in its pixel matrix. The signals are extracted every 100 ns and processed by the Pixel Trigger (PIT) system, to generate trigger primitives. Results are then sent within a latency of 800 ns to the Central Trigger Processor (CTP) to be included in the first Level 0 trigger decision. This paper describes the commissioning of the PIT, the tuning procedure of the front-end chips Fast-OR circuit, and the results of operation with cosmic muons and in tests with LHC beam. I. SYSTEM DESCRIPTION ALICE (A Large Ion Collider Experiment) is one of the experiments at the Large Hadron Collider (LHC) at CERN, optimized to study the properties of strongly interacting matter and the quark-gluon plasma in heavy ion collisions [1][2]. The ALICE experiment is designed to identify and track particles with high precision over a wide transverse momentum range (100 MeV/c to 100 GeV/c). ALICE will also take data with proton beams, in order to collect reference data for heavy ion collisions and to address specific stronginteraction topics for which ALICE is complementary to the other LHC detectors. The Silicon Pixel Detector (SPD) is the innermost detector of the ALICE experiment, providing vertexing and tracking capabilities [5][6][7]. As shown in Figure 1, the SPD is a barrel detector with two layers at radii of 3.9 cm and 7.6 cm, respectively, from the beam axis. The minimum distance between the beam pipe and the inner layer is ~5 mm. The SPD consists of 120 detector modules, called half-staves. Each of them includes two silicon pixel sensors, flip chip bump bonded to 10 front-end readout chips realized in a commercial 0.25 μm CMOS process. One front-end chip contains 8192 pixel cells organized in 32 columns and 256 rows. The pixel dimensions are 425 × 50 μm (z × rφ); in total there are 9.83 × 10 pixels in the SPD. In order to maintain the material budget constraint of 1% X0 per layer, the sensor chosen thickness is 200 μm and the pixel chips are thinned to 150 μm. Signal and power connections for the chips are provided by an aluminium multilayer bus, glued on top of the ladders. The 10 front-end chips of each half-stave are connected to a Multi Chip Module (MCM). The MCM contains 4 ASICs and one optical transceiver module: they provide timing, control and trigger signals to the chips. The MCM performs the readout of the front-end chips sending the data to the offdetector electronics in the control room [8]. The MCM is connected to 3 single mode optical fibers; two of them are used to receive the serial control and the LHC clock at 40.08 MHz, and the third is used to send the data to the offdetector electronics. Figure 1: SPD (right) and one half-stave (left) Each of the 1200 front-end chips of the SPD may activate its Fast-OR output every 100 ns when at least one pixel inside the chip is hit by a particle. The 1200 Fast-OR bits are sampled and transmitted to the off detector electronics by the MCM. The Fast-OR generation capability is a unique feature among the vertex detectors of the LHC experiments. It allows the SPD to act also as a low latency pad detector that can be added to the first level trigger decision of the ALICE experiment. The Pixel Trigger (PIT) system [9] was designed to process the Fast-OR bits and produce a trigger output for the Level 0 trigger decision. It is composed of 10 OPTIN boards that receive the data streams coming from the 120 modules of the SPD and extract the Fast-OR bits; the OPTIN boards are mounted on a 9U board, called BRAIN, with a large FPGA (called Processing FPGA, type Xilinx Virtex4) that can apply

New pixel detectors for the upgrade of the ALICE Inner Tracking System

This contribution presents the on-going pixel detector R&D activities and results for the upgrade of the ALICE Inner Tracking System (ITS). Both hybrid and monolithic pixel detectors are being considered. The aim is to develop a detector with a pixel size in the order of 30×30 μm2 (in the case of hybrid) or 20×20 μm2 (in the case of monolithic), and an optimized readout architecture to achieve a low power consumption not exceeding -250 mW/cm2. The material budget is another key issue of the new pixel detector: the design goal is to limit the overall material budget to 0.3% to 0.5% X0 per layer. Two options are under study for the readout architectures: the rolling shutter and the sparsified readout. The rolling shutter envisages a periodical row by row readout of the pixel matrix, which is intrinsically dead-time free but with event pile-up if the readout rate is lower than the collision rate. The sparsified readout option is based on a segmentation of the pixel matrix into small sub-matrices with a readout time that scales with the event multiplicity. Several test structures and prototype front-end chips have been developed and produced by the TowerJazz foundry and are being tested in order to evaluate the performance and the radiation hardness of its 180 nm CMOS technology.

Performance of the ALICE SPD cooling system

The new generation of silicon detectors for particle physics requires very reduced mass and high resistance to radiations with very limited access to the detector for maintenance. The Silicon Pixel Detector (SPD) is one of the 18 detectors of the ALICE (A Large Io Collider Experiment) experiment at the Large Hadron Collider (LHC) at CERN. It constitute the two innermost layers of the Inner Tracking System (ITS) and it is the closest detector to th interaction point. An evaporative cooling system, based on C4F10 evaporation at 1.9 bar, was chosen to extrac the 1.35 kW power dissipated by the on-detector electronics. The whole system wa extensively tested and commissioned before its installation inside the ALICE experimenta area. Since then we had to deal with a decrease of the flow in some lines of the system tha imposed severe restrictions on the detector operation. Recently, a test bench has been built in order to carry out a series of tests to reproduce the misbehaviour of the system and investigat proper actions to cure the problem. The performance of the systems and the most interesting results of the above mentioned test will be presented.

Low power, high resolution MAPS for particle tracking and imaging

We describe here the first monolithic pixel detector prototype embedding the OrthoPix architecture, specifically designed to deal with imaging applications where the relevant number of pixel hit per frame (occupancy) is small (on the order or less than 1%), like in High Energy Physics, Medical Imaging and other applications. Current state of the art employs complex circuitry into the pixel cell to discriminate relevant signals, leading to an extremely effective, non-destructive compression at the price of large power consumption and pixel area limitations. The OrthoPix architecture instead implements a passive projective compression scheme, leading to low power, small pixel cell and large area devices.

The ALICE Silicon Pixel Detector: commissioning and performance optimization

This paper describes the tests and measurements made during the final commissioning with beams of the ALICE Silicon Pixel Detector (SPD) in the first year of operation and the optimization of its performance. The ALICE Silicon Pixel Detector (SPD) is the innermost detector of the ALICE experiment and therefore plays a key role for vertexing and tracking. It consists of two cylindrical layers of pixel detectors, with a total of ~ 107 pixels. The detector provides a prompt trigger signal that contributes to the first level trigger decision in ALICE. The trigger signal has been extensively used in the first trigger level of the ALICE experiment for recording data of proton-proton collisions at energies of 900 GeV, 2.36 TeV and 7 TeV.