C. Irmler

Origami chip-on-sensor design: progress and new developments

The Belle II silicon vertex detector will consist of four layers of double-sided silicon strip detectors, arranged in ladders. Each sensor will be read out individually by utilizing the Origami chip-on-sensor concept, where the APV25 chips are placed on flexible circuits, glued on top of the sensors. Beside a best compromise between low material budget and sufficient SNR, this concept allows efficient CO2 cooling of the readout chips by a single, thin cooling pipe per ladder. Recently, we assembled a module consisting of two consecutive 6 double-sided silicon strip detectors, both read out by Origami flexes. Such a compound of Origami modules is required for the ladders of the outer Belle II SVD layers. Consequently, it is intended to verify the scalability of the assembly procedure, the performance of combined Origami flexes as well as the efficiency of the CO2 cooling system for a higher number of APV25 chips.

Construction and test of the first Belle II SVD ladder implementing the origami chip-on-sensor design

The Belle II Silicon Vertex Detector comprises four layers of double-sided silicon strip detectors (DSSDs), consisting of ladders with two to five sensors each. All sensors are individually read out by APV25 chips with the Origami chip-on-sensor concept for the central DSSDs of the ladders. The chips sit on flexible circuits that are glued on the top of the sensors. This concept allows a low material budget and an efficient cooling of the chips by a single pipe per ladder. We present the construction of the first SVD ladders and results from precision measurements and electrical tests.

Construction and Performance of a Double-Sided Silicon Detector Module Using the Origami Concept

The APV25 front-end chip with short shaping time will be used in the Belle II Silicon Vertex Detector (SVD) in order to achive low occupancy. Since fast amplifiers are more susceptible to noise caused by their capacitive input load, they have to be placed as close to the sensor as possible. On the other hand, material budget inside the active volume has to be kept low in order to constrain multiple scattering. We built a low mass sensor module with double-sided readout, where thinned APV25 chips are placed on a single flexible circuit glued onto one side of the sensor. The interconnection to the other side is done by Kapton fanouts, which are wrapped around the edge of the sensor, hence the name Origami. Since all front-end chips are aligned in a row on the top side of the module, cooling can be done by a single aluminum pipe. The performance of the Origami module was evaluated in a beam test at CERN in August 2009, of which first results are presented here.

Belle II silicon vertex detector

The Belle II experiment at the SuperKEKB collider in Japan is designed to indirectly probe new physics using approximately 50 times the data recorded by its predecessor. An accurate determination of the decay-point position of subatomic particles such as beauty and charm hadrons as well as a precise measurement of low-momentum charged particles will play a key role in this pursuit. These will be accomplished by an inner tracking device comprising two layers of pixelated silicon detector and four layers of silicon vertex detector based on double-sided microstrip sensors. We describe herein the design, prototyping and construction efforts of the Belle-II silicon vertex detector.

The Belle II Silicon Vertex Detector readout chain

The Silicon Vertex Detector of the future Belle II experiment at KEK (Japan) will consist of 6 double-sided strip sensors. Those are read out by APV25 chips (originally developed for CMS) which are powered by DC/DC converters with low voltages tied to the sensor bias potentials. The signals are transmitted by cable links of about 12 meters. In the back-end, the data are digitized and processed by FADC modules with powerful FPGAs, which are also capable of precisely measuring the hit time of each particle in order to discard off-time background.

Efficient signal conditioning by a FIR filter for analog signal transmission over long lines

In the Belle II SVD readout chain the analog signals will be transmitted over long lines. This leads to signal distortion, caused by the frequency dependent transfer function of the cable and also by reflections, which occur whenever the line impedance changes. One possibility to compensate these effects is a dedicated filter at the receiver end. This paper describes the approach to realize the required filter as a finite impulse response (FIR) filter. We further show how such a filter can be implemented in the firmware of an FPGA and the required FIR coeffients can directly be calculated from the output signal of the APV25 front-end chip.

Development of a Data Acquisition System for the Belle II Silicon Vertex Detector

Tohoku University, Miyagi, Japan The silicon-strip vertex detector in the Belle II experiment is one of essential detectors to search for physics beyond the Standard Model. To read out all 223,744 readout strips of the double-sided silicon strip detectors in high beam background, 1748 APV25 chips are employed for the frontend electronics. Hence, flash analog-to-digital conversion with high-density inputs is required on the back-end electronics. We developed prototypes of the back-end electronics and successfully performed a full integration test at the DESY electron beam line. In this paper, we report on the development of the prototypes and results from the beam test. Technology and Instrumentation in Particle Physics 2014, 2-6 June, 2014 Amsterdam, the Netherlands

First results of the Belle II Silicon Vertex Detector readout system

At the heart of the Belle II experiment at KEK (Japan), there will be a Vertex Detector (VXD) composed of 2 layers of DEPFET pixels (PXD) and 4 layers of double-sided silicon strip detectors (SVD). The latter use the APV25 front-end chip — originally developed for CMS — which is reading out the inner part of the SVD sensors through the Origami chip-on-sensor concept, including a state-of-the-art two-phase CO2 cooling. The whole system (including the full DAQ chain) was successfully tested in a beam at DESY in January 2014 and first results are presented here.

Comparison of n-side strip isolation methods for silicon sensors

Precision experiments at electron-positron-colliders and b-factories demand high position resolution and low material budget for precise particle tracking. These requirements are fulfilled by thin double-sided silicon detectors (DSSDs). However, due to the low signals of thin sensors a careful sensor design is required in order to achieve high charge collection efficiency. In this paper we investigate the p-stop and the p-spray blocking method for strip isolation on the n-side of DSSDs with n-type bulk. We compare three different p-stop patterns: the common p-stop, the atoll p-stop and a combined p-stop pattern, whereas for every pattern four different geometric layouts are considered. Test sensors featuring these p-stop patterns and the p-spray blocking method were tested in a 120 GeV/c hadron beam at the Super Proton Synchrotron (SPS) at CERN (Geneva, Switzerland), where one variant of the atoll p-stop pattern performed best. The results of these tests are used to design the DSSDs for the Belle II experiment at KEK (Tsukuba, Japan).

Electronics and mechanics for the Silicon Vertex Detector of the Belle II experiment

A major upgrade of the KEK-B factory (Tsukuba, Japan), aiming at a peak luminosity of 8 × 1035cm−2s−1, which is 40 times the present value, is foreseen until 2014. Consequently an upgrade of the Belle detector and in particular its Silicon Vertex Detector (SVD) is required. We will introduce the concept and prototypes of the full readout chain of the Belle II SVD. Its APV25 based front-end utilizes the Origami chip-on-sensor concept, while the back-end VME system provides online data processing as well as hit time finding using FPGAs. Furthermore, the design of the double-sided silicon detectors and the mechanics will be discussed.