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Dive into the research topics where Cadmus Yuan is active.

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Featured researches published by Cadmus Yuan.


Molecular Simulation | 2011

Validation of forcefields in predicting the physical and thermophysical properties of emeraldine base polyaniline

Xianping Chen; Cadmus Yuan; Cell K. Y. Wong; S. Koh; G.Q. Zhang

We report a molecular modelling study to validate the forcefields [condensed-phase optimised molecular potentials for atomistic simulation studies (COMPASS) and polymer-consistent forcefield (PCFF)] in predicting the physical and thermophysical properties of polymers. This work comprises of two key steps: (1) generating and validating the molecular model in predicting the material properties of the bulk amorphous emeraldine base polyaniline and (2) modelling the glass–rubber transition of the polymer. From all the molecular dynamics simulation results, it clearly shows that the more recent COMPASS forcefield provides a higher accuracy in predicting the polymer properties than PCFF, and it enables a more accurate prediction of condensed-phase properties (density, glass transition temperature, solubility parameters, etc.) in a broad range of temperature for various applications.


Microelectronics Reliability | 2007

Molecular simulation on the material/interfacial strength of the low-dielectric materials

Cadmus Yuan; Olaf van der Sluis; G.Q. Zhang; L.J. Ernst; Willem D. van Driel; Richard B. R. van Silfhout

Abstract In this paper, the material stiffness of amorphous/porous low- k material and interfacial strength between amorphous silica and low- k have been simulated by the molecular dynamics (MD) methods. Due to the low stiffness of the low- k material, the interfaces which include this material are critical for the most delamination and reliability issues around the IC back-end structure. MD simulation technique is applied to elucidate the crack/delamination mechanism at these critical interfaces. However, due to the amorphous nature of the low- k material (e.g., SiOC:H), the atomic modeling technique of the amorphous/porous silica is first established. Through the experimental validation, the accuracy of this amorphous modeling technique is obtained, and the results show that this algorithm can represent the trend of the mechanical stiffness change due to different chemical composition of low- k material. A novel interfacial modeling technique, which model the status of chemical bonds at interface during the delamination loading, is developed. Afterward, the simulation of the mechanical strength of the amorphous silica/SiOC:H interface, is implemented. The simulation depicts that the existence of the strong Si–O covalent bond will significantly enhance the adhesive strength of the interface. Instead of the covalent bond at interface, the simulation results also reveal the multiple atomic scaled crack path within the material during the interfacial delamination. Hence, improving the material stiffness of the soft low- k material and preventing the pore at interface can increase the adhesive strength of the silica/low- k interfacial system.


Microelectronics Reliability | 2007

Mechanical reliability challenges for MEMS packages: Capping

W.D. van Driel; D.G. Yang; Cadmus Yuan; M. van Kleef; G.Q. Zhang

This paper presents our effort to predict reliability problems for MEMS packages. MEMS devices are vulnerable to the external loads subjected to it. As such, MEMS devices need to be protected. Protections can be generated by capping the device: a piece of silicon is placed on top of it to create a cavity above it. Parametric finite element models are combined with dedicated verification experiments to address the reliability of four different capping concepts. The results gain a better understanding of MEMS capping issues, with failure modes as cavity deflection, cap fractures, and moisture penetration.


electronic components and technology conference | 2013

Effect of temperature gradient on moisture diffusion in high power devices and the applications in LED packages

Xuejun Fan; Cadmus Yuan

High power electronic devices create hot spots, which give rise to the junction temperature significantly higher than the ambient temperature. This induces a situation that the moisture diffusion from environment to device is in the direction against temperature gradient direction. In addition, far field relative humidity is different from the environment surrounding the packaged devices. In this paper, two mechanisms of moisture transport are studied. First, the localized relative humidity related to the far field ambient environment is investigated. Second, moisture diffusion in the presence of temperature gradient inside package is studied. Several scenarios are investigated with the use of an LED package as example.


Applied Physics Letters | 2008

Molecular simulation strategy for mechanical modeling of amorphous/porous low-dielectric constant materials

Cadmus Yuan; Olaf van der Sluis; G.Q. Zhang; L.J. Ernst; Willem D. van Driel; Amy E. Flower; Richard B. R. van Silfhout

We propose an amorphous/porous molecular connection network generation algorithm for simulating the material stiffness of a low-k material (SiOC:H). Based on a given concentration of the basic building blocks, this algorithm will generate an approximate and large amorphous network. The molecular topology is obtained by distributing these blocks randomly into a predefined framework. Subsequently, a structural relaxation step including local and global perturbations is applied to achieve the most likely stereochemical structure. Thus, the obtained mechanical properties of the low-k materials have been verified with the experimental data.


international conference on electronic packaging technology | 2012

Thermal analysis of phosphor in high brightness LED

Huaiyu Ye; Sau Koh; Cadmus Yuan; G.Q. Zhang

The drive to increased electrical currents input to achieve high lumen for Light Emitting Diode (LED) hasled to a series of thermal problems. Hence, thermal management for solid-state lighting (SSL) is a key design parameter as the temperature will directly affect the maximum light output, quality, reliability of the solid state lighting and the life time. Two of the major heat sources in LED package has been identify to be die and phosphor. Many thermal researches clear show the thermal behavior in LED package. But the phosphor efficiency in LED and its performance is still under discussion because it is more complex to separate the original light and converted light in LED. In this work,a group of experiment is executed to check the thermal effect of phosphors in LED and to distinguish the light from LED die or from phosphor. In addition, a numerical simulation is achieved with the efficiency of LED die and phosphor according to thermal analysis.


international conference on electronic packaging technology | 2012

Highly accelerated life testing of LED luminaries

M. Cai; Wenbin Chen; L. L Liang; Ming Gong; W.C Tian; Hongyu Tang; S. Koh; Cadmus Yuan; Zhen Zhang; G.Q. Zhang; D.G. Yang

With rapid development of lighting emitting diode (LED) market, more people are focusing on reliability testing method of LED luminaries system. Based on the previous exploration, to assess the whole system reliability with a fast way, authors propose to divide the system into several subsystems, and then carry out step stress accelerated testing (SSAT) to get failure mechanism and reliability distribution of each subsystem, finally calculate the life distribution of the whole system by combining with system statistics analysis methodologies. The first step, the most important step, is to know the stress limit of the subsystem before conducting SSAT testing. The intention of normal highly accelerated life test (HALT) process is to subject the item under test to stimuli well beyond the expected field environments to determine its operating and destruct limits, but without enough attention on those degradation parameters of products, especially like LED products which present their life characteristics on many output parameters, such as lumen maintenance, color rendering index (CRI), chromaticity coordinate, junction temperature and optical efficiency, which included important life information. Therefore, Focused on the LED light source subsystem, it is not practical to accelerate it with HALT by only focused on failure or destructive data. In this paper, different HALT procedure with different objects is introduced, and two types of LED system from separated vendors are conducted proposed HALT before SSAT testing. Test results suggested that it is feasible to observe output parameters of LED products to decide the stress limitation during HALT testing, pseudo junction temperature and Lumen maintenance can be regarded well as key parameters. For other parameters of system, different parameter has changed with different rule, which indicates that key concerned factor should be fixed. Meanwhile, it is found that the lumen maintenance decreases very fast when temp stress over 110 °C. When focused on some failure mechanisms without change even if overloading the stress, a good solution for a fast qualification method will be worked out. Deep study on this found should be carried out in future.


Microelectronics Reliability | 2006

Delamination analysis of Cu/low-k technology subjected to chemical-mechanical polishing process conditions

Cadmus Yuan; W.D. van Driel; R.B.R. van Silfhout; O. van der Sluis; R.A.B. Engelen; L.J. Ernst; F. van Keulen; G.Q. Zhang

The mechanical response at the interface between the silicon, low-k and copper layer of the wafer is simulated herein under the loading of the chemical-mechanical polishing (CMP). To identify the possible generation/propagation of the initial crack, the warpage induced by the thin-film fabrication process are considered, and applying pressure, status of slurry and the copper thickness are treated as the parameter in the simulation. Both the simulation and experimental results indicate that the large blanket wafer within high applying pressure would exhibit high stresses possible to delaminate the interface at the periphery of the wafer, and reducing the copper thickness can diminish the possibility of the delamination/failure of the low-k material.


Microelectronics Reliability | 2014

Design of vertical fin arrays with heat pipes used for high-power light-emitting diodes

Huaiyu Ye; Bo Li; Hongyu Tang; Jia Zhao; Cadmus Yuan; G.Q. Zhang

Abstract As Light-Emitting Diodes (LEDs) are negatively affected by high temperature, the thermal design for them is critical for better light quality, reliability and lifetime. In this work, a thermal design of vertical fin arrays with heat pipes as passive cooling was applied. The heat pipes can supply high thermal conductivity with much less weight and volume compared to copper or aluminum base and consequently less obstruction to air flow with enhanced natural convection. As the natural convection and radiation dominate heat transfer in this case, the optimum vertical fin spacing was calculated by the most used empirical correlations. Then, the design was numerical investigated by Computational Fluid Dynamics (CFD) to obtain best thermal performance. As the fin spacing was both optimized by correlations and modelling, the optimum thermal design achieved. Finally, we manufactured and tested the design experimentally which consistently approved the thermal design compared to correlations and simulation.


international conference on thermal mechanical and multi physics simulation and experiments in microelectronics and microsystems | 2011

FE modeling of Cu wire bond process and reliability

Cadmus Yuan; Esther Weltevreden; Pieter van dan Akker; René Kregting; Jan de Vreugd; G.Q. Zhang

Copper based wire bonding technology is widely accepted by electronic packaging industry due to the world-wide cost reduction actions (compared to gold wire bond). However, the mechanical characterization of copper wire differs from the gold wire; hence the new wire bond process setting and new bond pad structure is required. It also refers to the new intermetallic compound (IMC) will form at the interface of wire and bond pad. This paper will present the finite element analysis of the copper wire bond process and IMC forming and results in the stress pattern shift during the processes.

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G.Q. Zhang

Delft University of Technology

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Cell K. Y. Wong

Delft University of Technology

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W.D. van Driel

Delft University of Technology

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Xianping Chen

Delft University of Technology

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Stanley Y.Y. Leung

Hong Kong University of Science and Technology

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Hongyu Tang

Delft University of Technology

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Jia Wei

Delft University of Technology

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Fenglian Sun

Harbin University of Science and Technology

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Guoqi Zhang

Chinese Academy of Sciences

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