Cagkan Erbas

A systematic approach to exploring embedded system architectures at multiple abstraction levels

The sheer complexity of todays embedded systems forces designers to start with modeling and simulating system components and their interactions in the very early design stages. It is therefore imperative to have good tools for exploring a wide range of design choices, especially during the early design stages, where the design space is at its largest. This paper presents an overview of the Sesame framework, which provides high-level modeling and simulation methods and tools for system-level performance evaluation and exploration of heterogeneous embedded systems. More specifically, we describe Sesames modeling methodology and trajectory. It takes a designer systematically along the path from selecting candidate architectures, using analytical modeling and multiobjective optimization, to simulating these candidate architectures with our system-level simulation environment. This simulation environment subsequently allows for architectural exploration at different levels of abstraction while maintaining high-level and architecture-independent application specifications. We illustrate all these aspects using a case study in which we traverse Sesames exploration trajectory for a motion-JPEG encoder application.

Multiobjective optimization and evolutionary algorithms for the application mapping problem in multiprocessor system-on-chip design

Sesame is a software framework that aims at developing a modeling and simulation environment for the efficient design space exploration of heterogeneous embedded systems. Since Sesame recognizes separate application and architecture models within a single system simulation, it needs an explicit mapping step to relate these models for cosimulation. The design tradeoffs during the mapping stage, namely, the processing time, power consumption, and architecture cost, are captured by a multiobjective nonlinear mixed integer program. This paper aims at investigating the performance of multiobjective evolutionary algorithms (MOEAs) on solving large instances of the mapping problem. With two comparative case studies, it is shown that MOEAs provide the designer with a highly accurate set of solutions in a reasonable amount of time. Additionally, analyses for different crossover types, mutation usage, and repair strategies for the purpose of constraints handling are carried out. Finally, a number of multiobjective optimization results are simulated for verification.

A framework for system-level modeling and simulation of embedded systems architectures

The high complexity of modern embedded systems impels designers of such systems to model and simulate system components and their interactions in the early design stages. It is therefore essential to develop good tools for exploring a wide range of design choices at these early stages, where the design space is very large. This paper provides an overview of our system-level modeling and simulation environment, Sesame, which aims at efficient design space exploration of embedded multimedia system architectures. Taking Sesame as a basis, we discuss many important key concepts in early systems evaluation, such as Y-chart-based systems modeling, design space pruning and exploration, trace-driven cosimulation, and model calibration.

Calibration of abstract performance models for system-level design space exploration

High-level performance modeling and simulation have become a key ingredient of system-level design as they facilitate early architectural design space exploration. An important precondition for such high-level modeling and simulation methods is that they should yield trustworthy performance estimations. This requires validation (if possible) and calibration of the simulation models, which are two aspects that have not yet been widely addressed in the system-level community. This article presents a number of mechanisms for both calibrating isolated model components as well as a system-level performance model as a whole. We discuss these model calibration mechanisms in the context of our Sesame system-level simulation framework. Two illustrative case studies will also be presented to indicate the merits of model calibration.

A multiobjective off-line routing model for MPLS networks

This study focuses on the multiobjectivity in the off-line routing of QoS traffic in Multi-Protocol Label Switching (MPLS) Networks. The routing problem is formulated as a multiobjective mixed-integer programming. It aims at exploring the trade-offs between three objectives, namely minimal routing delay, optimal load-balance in the network, and minimal splitting of traffic trunks. For the multiobjectivity analysis, we first decompose the model into sub-problems. We then apply the lexicographic weighted Chebyshev metric method to these sub-problems to find the Pareto optimal solutions and visualize the trade-off between the objective functions. The study is finalized with a case study to analyse the basic properties of the model.

An IDF-based trace transformation method for communication refinement

In the Artemis project according to A.D. Pimentel et al. (2001), design space exploration of embedded systems is provided by modeling application behavior and architectural performance constraints separately. Mapping an application model onto an architecture model is performed using trace-driven co-simulation, where event traces generated by an application model drive the underlying architecture model. The abstract communication events from the application model may, however, not match the architecture-level communication primitives. This paper presents a trace transformation method, which is based on integer-controlled data-flow models, to perform communication refinement of application-level events. We discuss the proposed method in the context of our prototype modeling and simulation environment. Moreover, using several examples and a case study, we demonstrate that our method allows for efficient exploration of different communication behaviors at architecture level without affecting the application model.

On the Calibration of Abstract Performance Models for System-level Design Space Exploration

High-level performance modeling and simulation have become a key ingredient of system-level design as they facilitate early architectural design space exploration. An important precondition for such high-level modeling and simulation methods is that they should yield trustworthy performance estimations. This requires validation (if possible) and calibration of the simulation models, which are two aspects that have not yet been widely addressed in the system-level community. This paper presents an initial attempt to provide support for calibrating various model components of a system-level performance model. We discuss these model calibration mechanisms in the context of our Sesame system-level simulation framework. An illustrative case study will also be presented to indicate the merits of model calibration.

A Mixed-level Co-simulation Method for System-level Design Space Exploration

The Sesame modeling and simulation framework aims at efficient system-level design space exploration of embedded multimedia systems. A primary objective of Sesame is the exploration at multiple levels of abstraction. As such, it targets gradual refinement of its (initially abstract) architecture performance models while maintaining architecture-independent application specifications. In this paper, we present a mixed-level co-simulation method, called trace calibration, for incorporating external simulators into Sesames abstract system-level performance models. We show that trace calibration only requires minor modification of the incorporated simulators and that performance overheads due to co-simulation are minimal. Also, we show that trace calibration transparently supports distributed co-simulation, allowing for effectively reducing the system-level simulation slowdown due to the incorporation of lower-level simulators

Static priority scheduling of event triggered real time embedded systems

Real-time embedded systems are often specified as a collection of independent tasks, each generating a sequence of event-triggered code blocks, and the scheduling in this domain tries to find an execution order which satisfies all real-time constraints. Within the context of recurring real-time tasks, all previous work either allowed preemptions, or only considered dynamic scheduling, and generally had exponential complexity. However for many embedded systems running on limited resources, preemptive scheduling may be very costly due to high context switching and memory overheads, and dynamic scheduling can be less desirable due to high CPU overhead. In this paper we study static priority scheduling of recurring real-time tasks. We focus on the non-preemptive uniprocessor case and obtain schedule- theoretic results for this case. To this end, we derive a sufficient (albeit not necessary) condition for schedulability under static priority scheduling and show that this condition can be efficiently tested in practice. The latter is demonstrated with examples, where in each case, an optimal solution for a given problem specification is obtained within reasonable time, by first detecting good candidates using meta-heuristics, and then by testing them for schedulability.

IDF Models for Trace Transformations: A Case Study in Computational Refinement

The Sesame environment provides methods and tools for efficient design space exploration of heterogeneous embedded systems. It uses separate application and architecture models. The application model is explicitly mapped onto the architecture model and they are simulated together, using trace driven co-simulation. Since the abstraction level of the application model may not match the abstraction level of the architecture model, techniques are needed to refine the traces if necessary. In [13], we introduced integer-controlled dataflow (IDF) models to perform trace transformations for communication refinement. This paper uses these trace transformation methods to refine computational events. A simple case study, consisting of a 2D-IDCT application model mapped onto different architecture models, is used to show the capabilities of these IDF modeling techniques.