Carlos E. Saavedra
Queen's University
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Publication
Featured researches published by Carlos E. Saavedra.
IEEE Transactions on Microwave Theory and Techniques | 2010
Stanley S. K. Ho; Carlos E. Saavedra
This paper presents a broadband low-noise mixer in CMOS 0.13-¿m technology that operates between 1-5.5 GHz. The mixer has a Gilbert cell configuration that employs broadband low-noise transconductors designed using the noise-cancelling technique used in low-noise amplifer designs. This method allows broadband input matching and without the use of inductors that are frequently required in low-noise mixer designs. The current-bleeding technique is also used so that a high conversion gain can be achieved. Measured results show excellent noise and gain performance across the frequency span with an average double-sideband noise figure of 3.9 dB and a conversion gain of 17.5 dB. It has a third-order intermodulation intercept point of + 0.84 dBm at 5 GHz and it is also very compact with the size of the mixer core only being 0.315 mm2 .
IEEE Transactions on Microwave Theory and Techniques | 2008
You Zheng; Carlos E. Saavedra
An ultra-compact monolithic microwave integrated circuit active variable phase shifter is proposed and implemented using CMOS technology. It is a reflective-type phase shifter consisting of a compact three-transistor active circulator and a second-order LC network. The use of an active inductor in the second-order LC network makes this phase shifter all active and ultra compact with a size of only 0.357 including bonding pads. The phase shifter was designed and demonstrated at 2.4 GHz and has a linear and continuously tunable range of 120 across the 2.4-GHz industrial-scientific-medical band.
IEEE Transactions on Circuits and Systems | 2008
You Zheng; Carlos E. Saavedra
A very high-frequency operational transconductance amplifier (OTA) with a new feedforward-regulated cascode topology is demonstrated in this paper. Experimental results show a bandwidth of 10 GHz and a large transconductance of 11 mS. A theoretical analysis of the OTA is provided which is in very good agreement with the measured results. We also carry out a Monte Carlo simulation to determine the effect of transistor mismatches and process variations on the transconductance and input/output parasitic capacitances of the OTA. The linearity and intermodulation distortion properties of the OTA, which are of particular interest in microwave applications, are experimentally determined using a purpose-built single-stage amplifier. For high-frequency demonstration purposes we built a larger circuit: an inductor less microwave oscillator. The fabricated oscillator operates at 2.89 GHz and has a significantly larger output voltage swing and better power efficiency than other inductor less oscillators reported in the literature in this frequency range. It also has a very good phase noise for this type of oscillators: -116 dBc/Hz at 1-MHz offset.
IEEE Transactions on Circuits and Systems | 2010
You Zheng; Carlos E. Saavedra
An innovative vector-sum phase shifter with a full 360° variable phase-shift range is proposed and experimentally demonstrated in this paper. It employs an active balun and a very high-speed CMOS operational transconductance amplifier (OTA) integrator to generate the four quadrature basis vector signals. The fabricated chip operates in the 2-3 GHz, it exhibits an average insertion gain of 1.5 dB at midband, and has an RMS phase error below 5° over the measured frequency span. The chip consumes 24 mW of DC power and is highly compact, measuring only 0.38 mm2 including bonding pads.
IEEE Journal of Solid-state Circuits | 2008
Brad R. Jackson; Carlos E. Saavedra
In this work, the design and measurement of a new 4x subharmonic mixer circuit is presented using CMOS 0.18 m technology. With an RF input signal at 12.1 GHz, and an LO signal at 3.0 GHz, an intermediate frequency of 100 MHz is produced (fIF = fRF - 4fLO). The mixer uses a modified Gilbert-cell topology with octet-phase LO switching transistors to perform the quadruple subharmonic mixing. Included in the design is an active balun for the RF signal and a circuit that generates an octet-phase LO signals from a differential input. The mixer has a conversion gain of approximately 6 dB, 1-dB compression point of -12 dBm, IIP3 of -2 dBm, and IIP2 of 17 dBm. The circuit also exhibits excellent isolation between its ports (e.g. LO-RF: 71 dB, 4LO-RF: 59 dB).
IEEE Journal of Solid-state Circuits | 2010
Zhiyu Ru; Eric A.M. Klumperink; Carlos E. Saavedra; Bram Nauta
A multiband flexible RF-sampling receiver aimed at software-defined radio is presented. The wideband RF sampling function is enabled by a recently proposed discrete-time mixing downconverter. This work exploits a voltage-sensing LNA preceded by a tunable LC pre-filter with one external coil to demonstrate an RF-sampling receiver with low noise figure (NF) and high harmonic rejection (HR). The second-order LC filter provides voltage pre-gain and attenuates the source noise aliasing, and it also improves the HR ratio of the sampling downconverter. The LNA consists of a simple amplifier topology built from inverters and resistors to improve the third-order nonlinearity via an enhanced voltage mirror technique. The RF-sampling receiver employs 8 times oversampling covering 300 to 800 MHz in two RF sub-bands. The chip is realized in 65 nm CMOS and the measured gain across the band is between 22 and 28 dB, while achieving a NF between 0.8 to 4.3 dB. The IIP2 varies between +38 and +49 dBm and the IIP3 between -14 dBm and -9 dBm, and the third and fifth order HR ratios are more than 60 dB. The LNA and downconverter consumes 6 mW, and the clock generator takes 12 mW at 800 MHz RF.
IEEE Microwave and Wireless Components Letters | 2009
You Zheng; Carlos E. Saavedra
A very compact, active quasi-circulator is proposed and experimentally demonstrated in this work. It consists of an active balun and a current combiner using operational transconductance amplifiers in CMOS. Experimental results show that the insertion loss between the circulation ports is low and all three ports have input reflection coefficients below -10 dB. The chip operates from 1.5 to 2.7 GHz and it outperforms previously known monolithic microwave integrated circuit circulators covering this frequency range in terms of the S31 isolation, standing at -26 dB, as well as physical size: the integrated circuit measures only 0.25 mm2 including bonding pads.
IEEE Transactions on Microwave Theory and Techniques | 2012
Shan He; Carlos E. Saavedra
An 8.6 GHz × 2 subharmonic mixer with complementary current-reuse to enable ultra-low-voltage and low-power operation is presented. The RF transconductance stage of the mixer uses inductive source degeneration and the mixing core uses four transistors that are driven by a quadrature LO signal. A Volterra series analysis is carried out to determine the optimal gate biasing of the transconductor circuit to maximize the third-order intercept point (IIP3) performance of the RF stage and of the entire mixer. Experimental results show that the mixer has a conversion gain of 6.0 dB and an IIP3 of - 8.0 dBm. The entire circuit draws 0.6 mW from a 0.6 V supply. The chip was fabricated in a standard 130 nm CMOS process.
IEEE Transactions on Circuits and Systems | 2011
Ahmed M. El-Gabaly; Carlos E. Saavedra
A new quadrature tunable pulse generator is presented in this paper using 0.13 μm CMOS for 22-29 GHz ultrawideband (UWB) vehicular radar. A quadrature inductor-capacitor (LC) oscillator is quickly switched on and off for the duration of the pulse, and the amplitude envelope is modulated with an impulse using a variable passive CMOS attenuator. The impulse is realized using a glitch generator (CMOS nand gate) and its duration can be changed over a wide range (375 ps to more than 1 ns). The switching technique used in the quadrature oscillator creates a large initial voltage for fast startup (0.5 ns) and locks the initial phase of the oscillations to the input clock for pulse coherence. The measured phase noise thus matches that of the clock signal, with a relatively low phase noise of -70 dBc/Hz and -100 dBc/Hz at 1kHz and 1 MHz offsets respectively. The entire circuit operates in switched-mode with a low average power consumption of less than 2.2 mW and 14.8 mW at 50 MHz and 600 MHz pulse repetition frequencies, or below 11 pJ of energy for each of the four differential quadrature pulses. It occupies an active area of less than 0.41 mm2 .
IEEE Transactions on Circuits and Systems Ii-express Briefs | 2011
Jiangtao Xu; Carlos E. Saavedra; Guican Chen
An active inductor-based voltage-controlled oscillator (VCO) with a wide frequency tuning range was designed and fabricated using a standard 0.13-μm CMOS process. The oscillator has an LC-tank topology with cross-coupled transistors, and the active inductor was realized using a pair of fully differential very high-speed operational transconductance amplifiers. Due to the differential nature of the inductor, the even harmonics of the output signal were much reduced. Measured results show that the VCO is tunable from 833 MHz to 3.72 GHz, representing a tuning range of 127%. The VCO can produce -0.9 dBm of radio-frequency power. The core circuit, excluding output buffers, consumes 13 mW from a 1.2-V supply.