Carlos R. Baier

Design of a Discrete-Time Linear Control Strategy for a Multicell UPQC

A discrete-time linear control strategy for a multilevel three-phase unified power quality conditioner (UPQC) based on single-phase power cells is presented. The multi-variable, nonlinear, and coupled features of these topologies make the control strategy design a difficult task. Controlling this kind of system with single-variable linear controllers-as proposed in this work-presents significant advantages compared with other approaches as simplicity in the design steps due to the large amount of tools developed for this kind of schemes. Particularly, a classic design method based on the root locus approach is used to choose the controllers parameters in order to achieve a given dynamical behavior. Compensation of reactive power and fundamental frequency disturbances is presented in this paper as part of a general control strategy for multilevel active power filters. The proposed control strategy is implemented on the TMS320C6713 DSP-based system for a low-power laboratory prototype, and thus the controllers design is carried out on the discrete-time and -frequency domain. Also, due to the inherent asymmetries among the power cells in a modular topology, a dedicated local control strategy is proposed to ensure a symmetrical distribution of the power among the power cells. This feature allows the semiconductor devices of each module to operate under the same voltage and current ratings. Simulated and experimental results showing stationary and transient conditions demonstrate the feasibility of the control scheme.

Performance Evaluation of a Multicell Topology Implemented With Single-Phase Nonregenerative Cells Under Unbalanced Supply Voltages

The analysis of a multicell topology that is implemented with single-phase nonregenerative cells under an unbalanced ac mains is presented. The study shows that the topology naturally compensates most of the voltage unbalance; for instance, for a 100% voltage unbalance in the ac mains, just 32% reaches the load. For critical applications, a feedforward control technique is proposed in order to compensate the remaining unbalance at the load side. The resulting topology, in combination with the proposed strategy, reduces near to zero the load fundamental voltage unbalance, while the input current unbalance and distortion are also improved. A theoretical analysis that is based on symmetrical components and the experimental results confirm the theoretical considerations.

FPGA v/s DSP Performance Comparison for a VSC-Based STATCOM Control Application

Digital signal processors (DSPs) and field-programmable gate arrays (FPGAs) are predominant in the implementation of digital controllers and/or modulators for power converter applications. This paper presents a systematic comparison between these two technologies, depicting the main advantages and drawbacks of each one. Key programming and implementation aspects are addressed in order to give an overall idea of their most important features and allow the comparison between DSP and FPGA devices. A classical linear control strategy for a well-known voltage-source-converter (VSC)-based topology used as Static Compensator (STATCOM) is considered as a driving example to evaluate the performance of both approaches. A proof-of-concept laboratory prototype is separately controlled with the TMS320F2812 DSP and the Spartan-3 XCS1000 FPGA to illustrate the characteristics of both technologies. In the case of the DSP, a virtual floating-point library is used to accelerate the control routines compared to double precision arithmetic. On the other hand, two approaches are developed for the FPGA implementation, the first one reduces the hardware utilization and the second one reduces the computation time. Even though both boards can successfully control the STATCOM, results show that the FPGA achieves the best computation time thanks to the high degree of parallelism available on the device.

Digital Implementation of Selective Harmonic Elimination Techniques in Modular Current Source Rectifiers

Modular current source converters (MCSCs) have been proposed as an alternative method for increasing the power range of medium voltage PWM AC drives. MCSCs are built by stacking parallel current source converters. Two advantages that make MCSCs attractive are: (a) extended current/voltage ratings beyond the device ratings and (b) simplicity in balancing the DC link current in each module. This can be accomplished using two optimized modulating patterns that have been proposed for such topologies: (a) multilevel selective harmonic elimination (MSHE) and (b) displaced selective harmonic elimination (DSHE). Both techniques are based on SHE patterns but there are slight differences in their digital implementation due to the way they generate the harmonic cancellation. Furthermore, when these techniques are used in the rectifier stage, it is reported that MSHE and DSHE do not eliminate all the unwanted harmonics due to practical issues such as changes in the modulating indexes to control the DC link currents. This work compares the operation of DSHE and MSHE when used in rectifiers of an MCSC in terms of execution time, robustness to poor sampling frequency, and quality of harmonic profiles on AC input currents under different operating conditions. Experimental results are presented to validate the theoretical considerations.

Design of a Modular UPQC Configuration Integrating a Components Economical Analysis

A design procedure to select the components in a modular unified power-quality conditioner configuration based on single-phase cells is presented. The procedure is based on the fact that the load and distributor operating conditions range are known and it is required to impose stiff operating conditions in both the load side (regulation) and the point of common coupling side (power factor). Due to the arbitrary number of cells to be used in a modular approach, the proposed design procedure allows to select the power semiconductors and capacitors based on an economical evaluation, so an optimal number of cells can be chosen to minimize the overall power cell cost. This design procedure is well suited for modular configurations, where several degrees of freedom are not covered if just technical criteria are followed. Thus, an economic approach can be used to select the appropriate components. The rest of the devices, i.e., the transformers turn ratio and passive filters, are chosen using classical design methods based on technical issues such that the power cells operate within its permissible ratings. A practical case evaluation is presented for a medium voltage system application.

Analysis, Design and Control of a Unified Power-Quality Conditioner Based on a Current-Source Topology

This paper presents a three-phase unified power-quality conditioner based on current source converters (CSC-UPQC), including the design guidelines of the key components, an appropriate control scheme, and a selection procedure of the dc current level. Particularly, the ride through capability criterion is used to define a minimum dc current level so that the CSC-UPQC achieves the same characteristics as a UPQC based on voltage-source converters in terms of voltage disturbance compensation in the point of common coupling (PCC) and load power factor compensation. A 1.17 MVA load fed from a 3.3 kV system is used to show the proposed design procedure, and a laboratory prototype is implemented to show the system compensating sags and swells using low switching frequency in the CSC and maintaining a unitary displacement power factor in the PCC.

Improving Power Quality in Cascade Multilevel Converters Based on Single-Phase Nonregenerative Power Cells

Interharmonics exist in the ac supply currents in ac/dc/ac drives mainly due to the poor decoupled behavior of the dc-link stage. This issue is particularly evident when different input/output operating frequencies are used, causing harmful effects on power transformers and reducing the system efficiency and power quality. Consequently, large interharmonics can be found in converters with single-phase stages, as they require large electrolytic capacitors to filter out the dc-link second harmonic of voltage and current, which is usually not fully accomplished. This is the case of the cascade multilevel converter based on single-phase power cells, where each module has a single-phase rectifier and a single-phase inverter stage that cannot be effectively decoupled with standard size capacitors. This paper shows that it is possible to improve the quality of the power cell input currents when the input/output frequencies are different in the cascade multilevel converter. This is achieved by means of magnetic couplings among the dc-links of the power cells that feed different output phases, while keeping the high power quality on the load side.

Decoupled and Modular Harmonic Compensation for Multilevel STATCOMs

A modular and decoupled approach to achieve harmonic cancellation in a multilevel Static Compensator (STATCOM) is presented in this paper. This work shows that it is possible to split the compensation tasks depending on the frequency components present on the line current that is intended to be compensated by using the superposition principle and the modular features of an H-bridge based multilevel STATCOM. This approach allows the implementation of the topology with dedicated modules in order to decouple and simplify the control algorithms. The H-bridge modules can be implemented with two different kinds of semiconductors: (i) slow switches for fundamental frequency compensation modules and (ii) fast switches for harmonic frequency compensation modules. As the modules meant for harmonic cancellation can self-regulate its dc voltage, they can follow the load requirements and thus operate with minimum power. The theoretical analysis is validated in a laboratory prototype.

Predictive control of a current source rectifier with imposed sinusoidal input currents

A new predictive control strategy for current source rectifiers which allows an effective control of source and load currents is presented in this paper. This method uses the commutation states of the converter in the subsequent sampling time according to an optimization algorithm given by a cost function and the discrete system model. The two control goals are: (a) regulation of dc-link current according to an arbitrary reference, and (b) a good tracking of the source current to its sinusoidal reference. The feasibility of the proposed method is verified by MATLAB/Simulink software.

Current-source cascaded multilevel converters based on single-phase power cells

Nowadays the control of medium voltage motors has two main alternatives for its development: voltage source inverters (VSI); or current source inverters (CSI). The cascaded multilevel inverters derive from high voltage, high power quality and high reliability requirements in both development alternatives. Up to now, the cascaded multilevel converters have been implemented using voltage source power cells. However, they can also be implemented using current source units. One factor against CSIs is the large size of the inductive filters needed in the DC links, especially when single-phase inverters are considered. This paper presents a current-source cascaded multilevel converter (CS-CMC), based on single-phase power cells and their implementation alternatives, which enable a reduction in the sizes of the DC-link inductors. It is demonstrated that these sizes can be reduced using magnetic couplings between the DC links of the power cells. These magnetic couplings can eliminate second harmonic currents, as well as other even harmonics of current in the DC link of the power cells. This work asserts that the implementation of a current-source cascaded multilevel converter, based on single-phase power cells, must consider magnetic couplings between its DC links. Design results and the simulation of a development alternative of the system, aim to demonstrate the feasibility of implementing the cascaded multilevel converter.