Cedric Dehos

Receiver-Based Compensation of Transmitter-Incurred Nonlinear Distortion in Multiple-Antenna OFDM Systems

To enable an efficient implementation of multiple-antenna OFDM systems, this paper proposes an approach to reduce the influence of transmitter-induced nonlinearities in such systems. The approach comprises a preamble design, an estimation method and a digital compensation algorithm. Correction for the nonlinearities of the different transmitter branches is applied in the receiver, which requires no extra hardware. A numerical performance evaluation shows that the proposed approach can successfully be applied with minimal performance degradation compared to non-impaired systems.

Digital Compensation of Amplifier Nonlinearities in the Receiver of a Wireless System

In order to enable efficient implementation of wireless systems with high signal dynamics, this paper proposes an approach to estimate and correct for the amplitude and phase distortion caused by nonlinear power amplifiers. The approach comprises a preamble design, an estimation method and a digital compensation algorithm. Correction for the nonlinearities is applied in the receiver, which requires no additional hardware. Performance evaluation of a 60 GHz OFDM-based system shows that the proposed approach can successfully be applied with minimal performance degradation compared to non-impaired systems.

A Wideband and High-Linearity E -B and Transmitter Integrated in a 55-nm SiGe Technology for Backhaul Point-to-Point 10-Gb/s Links

This paper presents the design of a wideband and high-linearity

Robust BER estimator for DBPSK modulation

E

A broad-band 55-nm BiCMOS T/R switch for mmW 5G small cell access point

-band transmitter integrated in a 55-nm SiGe BiCMOS technology. It consists of a double-balanced bipolar ring mixer which upconverts a 16–21-GHz IF signal to the 71–76- and 81–86-GHz bands by the use of a 55/65-GHz local oscillator signal, followed by a broadband power amplifier which employs 2-way output power combining using an integrated low-loss balun transformer. The transmitter exhibits an average conversion gain of 24 dB and 22 dB at the 71–76- and 81–86-GHz bands, respectively, with an output 1-dB compression point greater than 14 and 11.5 dBm at each band. A maximum output power of 16.8 dBm is measured at 71 GHz. The dc power consumption is 575 mW. The presented transmitter is used to demonstrate the transmission of a 10.12-Gb/s 64 quadrature amplitude modulated signal with a spectral efficiency of 5.06 bit/s/Hz, which makes it suitable for use in future high-capacity backhaul and fronthaul point-to-point links.

Effects of Proton Irradiation on 60 GHz CMOS Transceiver Chip for Multi-Gbps Communication in High Energy Physics Experiments.

Fast industrial test of RF circuits is today a main challenge issue with current wireless standards. As the impact of the test on the overall product cost is no longer negligible, there is a strong motivation in simplifying the test. With the emergence of low throughput systems like ultra-narrow band ones, this topic becomes even more critical. The industrial test must be performed in few seconds per chip, it allows only few data bits for testing, making the real BER estimation unfeasible. In this paper we present a new way of estimating the BER for DBPSK modulation, which ensure accuracy, fast convergence and robustness against impairments like CFO. We also compare it to several classic BER estimators for the same kind of system, and discuss about the performances.

Wireless data transmission for high energy physics applications

This paper shows a passive broad-band SPDT T/R switch in 55-nm BiCMOS technology which covers most of the millimetre-wave bands considered for 5G (from 28 to 86 GHz). It is intended to be integrated into active phased array antenna modules for a 5G small cell access link. The realized switch presents minimum insertion loss of 2.6 dB. The switch isolation is better than 26 dB. Its very wide bandwidth (14-94 GHz) allows it to be used in K, Q, V and E bands. The area occupied by the chip is around 0.3 mm2.