Cédric Lauradoux

Matriochka symmetric Boolean functions

We present the properties of a new class of Boolean functions defined as the sum of m symmetric functions with decreasing number of variables and degrees. The choice of this construction is justified by the possibility to study these functions by using tools existing for symmetric functions. On the one hand we show that the synthesis is well understood and give an upper bound on the gate complexity. On the other hand, we investigate the Walsh spectrum of the sum of two functions and get explicit formulae for the case of degree at most three.

Bit matrix multiplication in commodity processors

Registers in processors generally contain words or, with the addition of multimedia extensions, short vectors of subwords of bytes or 16-bit elements. In this paper, we view the contents of registers as vectors or matrices of individual bits. However, the facility to operate efficiently on the bit-level is generally lacking. A commodity processor usually only has logical and shift instructions and occasionally population count instructions. Perhaps the most powerful primitive bit-level operation is the bit matrix multiply (BMM) instruction, currently found only in supercomputers like Cray. This instruction multiplies two ntimesn bit matrices. In this paper, we show the power of BMM. We propose and analyze new processor instructions that implement simpler BMM primitive operations more suitable for a commodity processor. We show the impact of BMM on the performance of critical application kernels and discuss its hardware cost.

Parallel Generation of l -Sequences

The generation of pseudo-random sequences at a high rate is animportant issue in modern communication schemes. The representationof a sequence can be scaled by decimation to obtain parallelism andmore precisely a sub-sequences generator. Sub-sequences generatorsand therefore decimation have been extensively used in the past forlinear feedback shift registers (LFSRs). However, the case ofautomata with a non linear feedback is still in suspend. In thispaper, we have studied how to transform of a feedback with carryshit register (FCSR) into a sub-sequences generator. We examine twosolutions for this transformation, one based on the decimationproperties of l-sequences, i.e.FCSR sequenceswith maximal period, and the other one based on multiple stepsimplementation. We show that the solution based on the decimationproperties leads to much more costly results than in the case ofLFSRs. For the multiple steps implementation, we show how thepropagation of carries affects the design.