Cesar Ortega-Sanchez

User friendly smart home infrastructure: BeeHouse

Home Automation is a major commercial field in modern days, many manufacturers have realised that fact and started to produce different types of solutions targeted at that market. The paper will present a user friendly smart home infrastructure that offers the base platform for modular wireless nodes (utilising ZigBee technology integrated with the Arduino microcontroller board) which can collect data, send information and control almost any aspect of the house (given that a proper interface is established), as well as the ability to access those nodes and their information through a cross-platform graphical user interface (a combination of Java and MySQL database). The system will be referred to as “BeeHouse” in this paper. This paper will propose a possible solution for a wireless modular home automation system that is smart, user friendly and easy to setup. This paper is part of the thesis of a final year project in Bachelors of Engineering (Computer Systems Engineering).

Modular autonomous robotics platform for educational use

Robotics is a field that continues to grow as robots become common in environments as varied as households and the battlefield. This paper presents a low cost robotics development platform using commercial off-the-shelf parts for educational and academic use. It is a direct response to the high cost and limited functionality of existing platforms. A navigation and obstacle-avoidance Fuzzy Controller is provided to accelerate the typical development process for a mobile robot. The fundamental aim is to facilitate future robotics projects by producing an inexpensive, modular and highly accessible platform that improves upon existing commercial offerings.

Hardware-based text-to-braille translator

This paper describes the hardware implementation of a text to Braille Translator using Field-Programmable Gate Arrays (FPGAs). Different from most commercial software-based translators, the circuit presented is able to carry out text-to-Braille translation in hardware. The translator is based on the translating algorithm, proposed by Paul Blenkhorn [1]. The Very high speed Hardware Description Language (VHDL) was used to describe the chip in a hierarchical way. The test results indicate that the hardware-based translator achieves the same results as software-based commercial translators.

MiniMIPS: An 8-Bit MIPS in an FPGA for Educational Purposes

Expectations of Electrical Engineering students about their courses have changed over the years. Even though the basic principles of Digital Electronics remain the same, tools and laboratory activities need to accommodate more demanding expectations. This paper presents MiniMIPS: an 8-bit implementation of the MIPSs single-cycle architecture for educational purposes. The MiniMIPS is targeted to the BASYS Spartan 3E development board. The user interface consists of DIP switches, push-buttons, LEDs and four 7-segment displays. The instruction set consists of 9 instructions and 3 instruction formats. Programs for the MiniMIPS are developed in a custom-made assembler/simulator tool, also presented in this paper. A MiniMIPS assembly program to generate the Fibonacci series is presented as an example. A description of laboratory tasks currently used is offered.

Electronic Assisting Violin Tuner

This paper presents the design concept, implementation and verification process of the Electronic Assisting Violin Tuner (EAVT). The analysis of the violin sound to extract the frequency information was done using a Goertzel filter which was optimised and embedded to a microcontroller. The resulting frequency information is used to control actuators to tune the violin. Safety issues have also been considered and appropriate actions have been taken to reduce the risk of accidental string breakages which could result in injuring the violinist. The goal of this project was to develop a device to assist in tuning every string of the violin. This project was undertaken with intentions that it could be further developed to increase the stability and robustness to the level that the prototype is fit for the market. It is therefore expected that there is still many areas of this project to improvement upon.

A System for Fast Text-to-Braille Translation Based on FPGAs

This paper describes a fast text to braille translator based on field programmable gate arrays (FPGAs). Compared with most commercial methods, this translator is able to carry out the translation in hardware instead of using software. To achieve the fast translation, a FPGA with big programmable resource has been utilized, and an algorithm, proposed by Paul Blenkhorn, has been revised to perform the fast translation. The translator has been described using very high speed integrated circuit hardware description language (VHDL). The test results indicate that the hardware-based translator achieves the same results as software-based commercial translators, and moreover, this system achieves superior throughput compared to Blenkhorns original algorithm.

Text-to-Braille Translator in a Chip

This paper describes the hardware implementation of a text to Braille translator using field-programmable gate arrays (FPGAs). Different from most commercial software-based translators, the circuit presented in this paper is able to carry out text-to-Braille translation in hardware. The translator is based on the translating algorithm, proposed by Paul Blenkhorn (1997). The very high speed hardware description language (VHDL) was used to describe the chip in a hierarchical way. The test results indicate that the hardware-based translator achieves the same results as software-based commercial translators, with superior throughput.

Digital Talking Book Player for the Visually Impaired Using FPGAs

The Digital Talking Book (DTB) player is a device for the visually impaired to read, search, navigate and bookmark written material using DAISY and EPUB standards. This paper presents the design and implementation of a DTB player in an FPGA-based embedded system to play audio books containing MP3 (Daisy) files and utilize Text to Speech Synthesis (TTS) for text only books or EPUB books.

A Hardware Based Braille Note Taker

This paper describes a Braille note taker implemented in hardware. The system is able to perform Braille to text translation as well as note taking. A method is presented on how to achieve Braille note taking using a Braille keyboard. To perform Braille to text translation, a translating system has been built based on previous work. Using very high speed integrated circuit hardware description language (VHDL) and a field programmable gate arrays (FPGAs) development platform, a system that includes the keyboard controller and translator has been hierarchically described and implemented.

Development and analysis of genetic algorithms: Sudoku case study

This paper discusses the design and subsequent analysis of software implementing a configurable genetic algorithm. The genetic algorithm is primarily targeted towards the solving of Sudoku puzzles. Sudoku is regarded as an ideal test-bed for algorithm development due to the fact that it is a constrained optimisation problem that belongs to the NP-complete class of computational problems. The aim of this paper is to outline the various features currently implemented in the software, and to present preliminary results of an analysis of various aspects of the underlying genetic algorithm.