Changhun Ko

Ge nitride formation in N-doped amorphous Ge2Sb2Te5

The chemical state of N in N-doped amorphous Ge2Sb2Te5 (a-GST) samples with 0–14.3Nat.% doping concentrations was investigated by high-resolution x-ray photoelectron spectroscopy (HRXPS) and Ge K-edge x-ray absorption spectroscopy (XAS). HRXPS showed negligible change in the Te 4d and Sb 4d core-level spectra. In the Ge 3d core-level spectra, a Ge nitride (GeNx) peak developed at the binding energy of 30.2eV and increased in intensity as the N-doping concentration increased. Generation of GeNx was confirmed by the Ge K-edge absorption spectra. These results indicate that the N atoms bonded with the Ge atoms to form GeNx, rather than bonding with the Te or Sb atoms. It has been suggested that the formation of Ge nitride results in increased resistance and phase-change temperature.

The Charge Storage Characteristics of Si‐QDs Embedded in Silicon Nitride Films (abstract)

Silicon quantum dots (Si‐QDs) are being increasingly considered for memory applications. We investigated the effect of annealing on capacitance‐voltage (C‐V) characteristics of Si‐QDs embedded in silicon nitride films. The Si‐QDs dispersed in silicon nitride films were formed by plasma‐enhanced chemical‐vapor deposition and annealed at 1,000° C in ultra‐high‐vacuum (UHV) for 5 min. In order to measure the C‐V characteristics of the Si‐QDs, metal‐insulator‐semiconductor structures were fabricated. The C‐V characteristics were measured at room temperature using HP 4280A at a frequency of 1 MHz. In addition, the physical characteristics of Si‐QDs were measured by photoluminescence (PL) and Fourier transform infrared spectroscopy (FTIR). When the sweep voltage was increased from 5 to 11 V, the width of C‐V hysteresis in the annealed sample increased. These results were in good agreement with PL and FTIR results. As a result, we found that annealing in UHV is a significant factor affecting charge storage.Silicon quantum dots (Si‐QDs) are being increasingly considered for memory applications. We investigated the effect of annealing on capacitance‐voltage (C‐V) characteristics of Si‐QDs embedded in silicon nitride films. The Si‐QDs dispersed in silicon nitride films were formed by plasma‐enhanced chemical‐vapor deposition and annealed at 1,000° C in ultra‐high‐vacuum (UHV) for 5 min. In order to measure the C‐V characteristics of the Si‐QDs, metal‐insulator‐semiconductor structures were fabricated. The C‐V characteristics were measured at room temperature using HP 4280A at a frequency of 1 MHz. In addition, the physical characteristics of Si‐QDs were measured by photoluminescence (PL) and Fourier transform infrared spectroscopy (FTIR). When the sweep voltage was increased from 5 to 11 V, the width of C‐V hysteresis in the annealed sample increased. These results were in good agreement with PL and FTIR results. As a result, we found that annealing in UHV is a significant factor affecting charge storage.

Photoluminescence Properties in Ge Nanoclusters Formed by Nitridation of Ge Surface Modified by Dry Etching (abstract)

Nano‐size metals and semiconductors self‐assembled in the dielectric matrix have recently shown strong possibility in the development of memory and optical devices. We report the optical properties of the Ge nanoclusters in the GeNx matrix by analyzing photoluminescence (PL) spectroscopy data. Ge thin film (5–10 nm) was grown by the molecular beam epitaxy method on Si(100) wafer and dry‐etched by Ar+ plasma. The nitridation and rapid thermal annealing of Ge thin film were applied by the ion gun and e‐beam heating methods, respectively. All processes were performed in situ in the ultra‐high vacuum. Taking out the sample in air, we obtained the surface roughness of the film with about 1–2 nm from the atomic force microscopy data analysis. We measured the PL spectra at the room temperature and 150° K and determined the PL peak positions at 400, 500, and 600 nm. We suggest an annealing method for controlling the size and density of Ge nanoclusters and discuss the results of the conventional method using the s...

Change of Schottky barrier height in Er-silicide/p-silicon junction

Ultra thin Er-silicide layers formed by Er deposition on the clean p-silicon and in situ post annealing technique were investigated with respect to change of the Schottky barrier height. The formation of Er silicides was confirmed by XPS results. UPS measurements revealed that the workfunction of the silicide decreased and was saturated as the deposited Er thickness increased up to . We found that the silicides were mainly composed of Er5Si3 phase through the XRD experiments. After Schottky diodes were fabricated with the Er silicide/p-Si junctions, the Schottky barrier heights were calculated from the I-V measurements of the Schottky diodes. There was large discrepancy in the Schottky barrier heights deduced from the UPS with the ideal junction condition and the real I-V measurements, so that we attributed the discrepancy to the phase in the Er-silicides and the large interfacial density of trap state of it.p-형 실리콘 기판 위에 수 A 두께의 어븀 금속을 증착하고, 후열처리 과정을 통하여 어븀-실리사이드/ p-형 실리콘 접합을 형성하였다. 초고진공 자외선 광전자 분광 실험을 통하여 증착한 어븀의 두께에 따라 어븀?실리사이드의 일함수가 4.1 eV까지 급하게 감소하는 것을 관찰하였으며, X-ray 회절 실험에 의하여 형성된 어븀 실리사이드가 주로 Er?Si₃상으로 구성되어 있음을 밝혔다. 또한, 어븀-실리사이드/ p-형 실리콘 접합에 알루미늄 전극을 부착하여 쇼트키 다이오드를 제작하고, 전류-전압 곡선을 측정하여 쇼트키 장벽의 높이를 산출하였다. 산출된 쇼트키 장벽의 높이는 0.44 ~ 0.78 eV이었으며 어븀 두께 변화에 따른 상관 관계를 찾기 어려웠다. 그리고 이상적인 쇼트키 접합을 가정하고 이미 측정한 일함수로부터 산출한 쇼트키 장벽의 높이는 전류-전압 곡선으로부터 산출한 값에 크게 벗어났으며, 이는 어븀-실리사이드가 주로 Er?Si₃상으로 구성되어 있고, Er?Si₃/ p-형 실리콘 계면에 존재하는 고밀도의 계면 상태에 기인한 것으로 사료된다.