Changhwan Oh

A high-speed ATM switch architecture using random access input buffers and multi-cell-time arbitration

We introduce a new high-speed ATM switch using random access input buffers (RAIB) and multi-cell-time arbitration (MCTA), and evaluate its performance for uniform traffic by a numerical method and by computer simulations. The switch has N same input modules each of which is similar to the common shared buffer switch. N address buffers (ABs) in the input module are used for the N output, and the ABs for a certain output in different input modules are controlled by an external arbitrator. The MCTA arbitration is employed in order to reduce the required arbitration rate as well as to provide the guard time when the switch is operated at a very high-speed. In MCTA arbitration, the service order of two or more cells destined for the same output is determined by one arbitration, but the cells are transmitted one by one in each time slot.

A study on traffic parameters estimation of call admission control in ATM networks

Much effort has been being devoted to studying the ATM technology for supporting multiservice high-speed communication networks. Since ATM adopts the statistical multiplexing technique, call admission control (CAC) is one of the most important issues under discussion. Until now, many CAC algorithms have calculated the required bandwidth of the connection using the parameters of a general source model. However, in actual ATM networks, each subscriber needs to declare the traffic characteristic in the form of a determinant traffic descriptor such as PCR (peak cell rate), SCR (sustainable cell rate), and MBS (maximum burst size) during the call set-up phase. Therefore, such determinant traffic parameters are necessary to be calculated from the VBR source modeling in ATM networks. In this paper, we work on traffic parameters estimation from VBR source modeling in ATM networks. Through simulation, we determine the traffic parameters from the VBR source modeling, which satisfy the quality of service (QOS) requirements with the least cost. Our study lets us gain a deep insight into the traffic parameters when the source parameters and the buffer size are varied.

A queue length-based scheduling scheme in ATM networks

We propose a new scheduling algorithm, named queue length-based weighted round robin (QL-WRR), in order to improve the efficiency of the WRR under a burst traffic environment. The proposed scheme can efficiently support the burst traffic by using a threshold value of a queue length and a weight-up factor. Through a simulation study, we evaluate performances of the proposed scheme and compare the scheme with the round robin and WRR disciplines, in terms of the mean cell delay, 99 percentile cell delay bound, and cell loss rate.

Performance comparison of high-speed input-buffered ATM switches

In this paper, we compare several input-buffered ATM switch architectures. Before comparison, the reasons underlying the application of input-buffered ATM switches are discussed. Then, classification of the input-buffered architectures is given. Next, structures and operation of basic switching elements are presented, including the ordinary input-buffered switch, the odd-even switch, the grouped input-queued (GIQ) switch, and the random access input-buffered (RAIB) switch which we presented before. Finally, comparisons of switching performances and such issues as speed of operation, memory utilization efficiency and multicasting functions are presented.

Cell selection algorithm for the multiple input-queued ATM switch: chessboard and random cell selections

A simple and efficient cell selection algorithm for the multiple input-queued ATM switch, named the chessboard cell selection algorithm, is proposed in this paper. The proposed algorithm selects one of the transmission requests for the output port with the lowest value of transmission request sum. By doing so, we can reduce a newly introduced front-of-line (FOL) blocking so as to achieve an enhancement in the throughput for uniform arrival traffic. Besides the enhanced throughput, the proposed algorithm can reduce mean cell delay by 50% or more and cell loss probability by 90% or more than the random selection scheme. Time complexity is O(N/sup 2/) in the worst case, where N is the switch size.

A new traffic conditioner for guaranteeing throughput fairness of assured services in a differentiated service network

Assured service (AS) connections in a differentiated service (DiffServ) network are not supplied with the expected service levels, which stems from the unfair allocation of the network bandwidth mainly caused by three factors-different TCP reserved rate, UDP/TCP interaction and round trip time (RTT). In order to alleviate simultaneously the impacts of the three factors, this paper proposes the W2F-TC (weighted-write-fair traffic conditioner) to be installed at an edge router in a DiffServ network. W2F-TC is composed of three phases, namely the traffic shaping phase, the writing probability calculation phase and the weighted writing phase. W2F-TC allows AS connections not only to attain reserved rates but also to approach ideal rates with lessening of the impact of both different TCP reserved rate and UDP/TCP interaction. In case of RTT, W2F-TC guarantees throughput assurance compared with the RIO-based traffic conditioner.

A MAC scheme for multimedia services over ATM-based PON

This paper proposes a novel MAC scheme over ATM-based PON (APON) based on the cell arrival timing information, to provide residential and small business customers with multimedia services. The proposed scheme supports the frame format of the ITU-T recommendation G.983 and also provides ATM service classes such as CBR, rtVBR, nrtVBR, ABR, and UBR traffic. Each service is allocated on the basis of priority and cell arrival timing information. Especially, the CBR and rtVBR services, which are sensitive to delay and CDV are allocated with higher priority and more exact arrival timing resolution which is achieved with specific coding and ranging procedure. For the proposed MAC scheme, we present a grant field format, minislot format, and bandwidth allocation algorithm. Computer simulation results show that the performance of the proposed scheme is significantly improved in terms of CDV and delay time in the case of CBR and rtVBR services, compared with the normal FIFO scheme.

A time-based weighted fair queueing algorithm for improving CDV and CLP in ATM networks

Generally, a cell scheduler is required to satisfy the criteria of cell delay, cell loss probability and CDV (cell delay variation) for real-time services, and the one of cell loss probability for non-real-time services. This paper proposes a new scheduling algorithm named TWFQ (time-based weighted fair queueing) not only to maintain the fair utilization of the available bandwidth but also to improve the performance of CDV and cell loss probability. The TWFQ algorithm makes use of the cell inter-arrival time of each connection for determining the cell service order among connections, which contributes to get a small CDV. To achieve a low cell loss probability, the TWFQ allows connections, which suffer from the more bursty input traffic, to send the cell with more opportunities by using two scheduling phases. Through simulations, we show that the proposed algorithm achieves good performance in terms of CDV and cell loss probability, while other performance criteria are preserved in an acceptable level.