Charles Renard

Novel heterostructured Ge nanowires based on polytype transformation.

We report on a strain-induced phase transformation in Ge nanowires under external shear stresses. The resulted polytype heterostructure may have great potential for photonics and thermoelectric applications. ⟨111⟩-oriented Ge nanowires with standard diamond structure (3C) undergo a phase transformation toward the hexagonal diamond phase referred as the 2H-allotrope. The phase transformation occurs heterogeneously on shear bands along the length of the nanowire. The structure meets the common phenomenological criteria of a martensitic phase transformation. This point is discussed to initiate an on going debate on the transformation mechanisms. The process results in unprecedented quasiperiodic heterostructures 3C/2H along the Ge nanowire. The thermal stability of those 2H domains is also studied under annealing up to 650 °C by in situ TEM.

Lateral epitaxial growth of germanium on silicon oxide

We have developed a method using local oxidation on silicon to create nanoscale silicon seeds for the lateral epitaxial overgrowth of germanium on silicon oxide. The germanium growth starts selectively from silicon seed lines, proceeds by wetting the SiO2 layer and coalesces without formation of grain boundary. Analysis by high resolution transmission electron microscopy have shown that Ge layers grown above silicon oxide are perfectly monocrystalline and are free of defect. The only detected defects are situated at the Ge∕Si interface. Geometrical phase analyses of the microscopy images have shown that the Ge layer is fully relaxed and homogeneous.

High current density GaAs/Si rectifying heterojunction by defect free Epitaxial Lateral overgrowth on Tunnel Oxide from nano-seed

Interest in the heteroepitaxy of GaAs on Si has never failed in the last years due to the potential for monolithic integration of GaAs-based devices with Si integrated circuits. But in spite of this effort, devices fabricated from them still use homo-epitaxy only. Here we present an epitaxial technique based on the epitaxial lateral overgrowth of micrometer scale GaAs crystals on a thin SiO2 layer from nanoscale Si seeds. This method permits the integration of high quality and defect-free crystalline GaAs on Si substrate and provides active GaAs/Si heterojunctions with efficient carrier transport through the thin SiO2 layer. The nucleation from small width openings avoids the emission of misfit dislocations and the formation of antiphase domains. With this method, we have experimentally demonstrated for the first time a monolithically integrated GaAs/Si diode with high current densities of 10 kA.cm−2 for a forward bias of 3.7 V. This epitaxial technique paves the way to hybrid III–V/Si devices that are free from lattice-matching restrictions, and where silicon not only behaves as a substrate but also as an active medium.

Dislocation and antiphase domain free microscale GaAs crystals grown on SiO2 from (001) Si nano-areas

The epitaxial lateral overgrowth of microscale GaAs crystals on a 0.6 nm thick SiO2 layer from nanoscale Si seeds is investigated in order to develop GaAs monolithic hetero-epitaxy onto (001) Si. The nucleation from small width openings enables to avoid the emission of misfit dislocations and the formation of antiphase domains. Consequently, the interface between the GaAs island and the SiO2 layer remains perfectly sharp and free of defects. The only defects found by transmission electron microscopy in each island are pairs of twins, and a simple model based on the anisotropy of zinc blende crystal is proposed to explain their formation. Micro-photoluminescence measurements performed at room temperature show that these twins are not detrimental for the quality of microscale GaAs crystals.

Gold anchoring on Si sawtooth faceted nanowires

This paper reports on the sawtooth faceting and the related gold coverage of silicon nanowires (NWs). 111-oriented Si NWs were grown on Si(111) substrates by ultra high vacuum chemical vapor deposition using the vapor-liquid-solid mechanism with a gold catalyst. We observed that gold nanoclusters are unequally distributed on the NW surface. They are mainly distributed on only three non-consecutive sidewalls corresponding to the (), () and () planes among the six available crystallographic {112} surfaces. In addition they are anchored on upward {111} facets. This original observation brings enhanced knowledge on the faceting mechanisms. The threefold symmetry of the facet formation and gold anchoring is supported by criteria of minimal Au/Si interfacial energy. Moreover results evidence that the selective presence of gold on the NW sidewalls affects the overall morphology due to an increased radial growth on the covered sidewalls.

Growth kinetics of Ge crystals on silicon oxide by nanoscale silicon seed induced lateral epitaxy

In this paper, we present our studies on the growth kinetics of Ge crystals on silicon oxide by nanoscale seed induced lateral epitaxy. We propose a simple and reliable method based on standard local oxidation of silicon technique for creating nanoscale silicon seeds at the edge of thermally grown silicon oxide stripes of desired thickness. The growth of Ge from germane is initiated in the two silicon seed lines and evolves toward a complete wetting of the SiO2 stripe after coalescence. The wetting mechanism of SiO2 by Ge is strongly dependent on the seed orientation and closely related to the development of {111} facets. The coalescence of adjacent Ge crystals results in an improvement in the organization of the initial material. As a result, no defect is visible in the inner part of the structure. The observed defects are arrays of misfit dislocations standing along the seed lines, while only few dislocations are visible through the Ge crystal. Geometric phase analysis of high resolution transmission el...

Composition and local strain mapping in Au-catalyzed axial Si/Ge nanowires

For most applications, heterostructures in nanowires (NWs) with lattice mismatched materials are required and promise certain advantages thanks to lateral strain relaxation. The formation of Si/Ge axial heterojunctions is a challenging task to obtain straight, defect free and extended NWs. And the control of the interface will determine the future device properties. This paper reports the growth and analysis of NWs consisting of an axial Si/Ge heterostructure grown by a vapor-liquid-solid process. The composition gradient and the strain distribution at the heterointerface were measured by advanced quantitative electron microscopy methods with a resolution at the nanometer scale. The transition from pure Ge to pure Si shows an exponential slope with a transition width of 21 nm for a NW diameter of 31 nm. Although diffuse, the heterointerface makes possible strain engineering along the axis of the NW. The interface is dislocation-free and a tensile out-of-plane strain is noticeable in the Ge section of the NW, indicating a lattice accommodation. Experimental results were compared to finite element calculations.

Shear-driven phase transformation in silicon nanowires

We report on an unprecedented formation of allotrope heterostructured Si nanowires by plastic deformation based on applied radial compressive stresses inside a surrounding matrix. Si nanowires with a standard diamond structure (3C) undergo a phase transformation toward the hexagonal 2H-allotrope. The transformation is thermally activated above 500 °C and is clearly driven by a shear-stress relief occurring in parallel shear bands lying on {115} planes. We have studied the influence of temperature and axial orientation of nanowires. The observations are consistent with a martensitic phase transformation, but the finding leads to clear evidence of a different mechanism of deformation-induced phase transformation in Si nanowires with respect to their bulk counterpart. Our process provides a route to study shear-driven phase transformation at the nanoscale in Si.

Low temperature activation of Au/Ti getter film for application to wafer-level vacuum packaging

Non-evaporable getter (NEG) thin films based on alloys of transition metals have been studied by various authors for vacuum control in wafer-level packages of micro electro mechanical systems (MEMS). These materials have typically a relatively high activation temperature (300–450 °C) which is incompatible with some temperature sensitive MEMS devices. In this work we investigate the potential of Au/Ti system with a thin or ultrathin non oxidizable Au layer as a low activation temperature getter material. In this bilayer system, gettering activation is produced by thermal outdiffusion of titanium atoms through the gold film. The outdiffusion kinetics of titanium was modelled and characterized by scanning electron microscopy (SEM), X-ray photoelectron spectroscopy (XPS), and Rutherford backscattering spectrometry (RBS) at various temperatures. Results confirm that Au/Ti bilayer is a promising getter material for wafer-level packaging with an activation temperature below 300 °C for 1 h annealing time.

Structural, Optoelectronic and Electrical Properties of GaAs Microcrystals Grown from (001) Si Nano-areas

An innovative approach is being investigated to develop III–V compounds on silicon (Si) substrates with the purpose to offer a technological alternative for the development of high efficiency solar cells ( ∼ 30 %). Until now, germanium (Ge) substrate has been the privileged material for the development of III–V multi-junctions (MJ) solar cells mainly dedicated to space applications. Ge offers several advantages, namely the lattice matching to Si and its use as a bottom cell in the MJ. However, the main drawback remains the cost of Ge substrates, which makes it inappropriate for terrestrial photovoltaic (PV) applications. New routes for high efficiency MJ solar cells are expected through the significant improvements of the selective area epitaxy (Li et al., J Appl Phys 103:106102, 2008; Deura et al., J Cryst Growth 310:4768–4771, 2008; Hsu et al., Appl Phys Lett 99:133115, 2011) allowing defect free III–V compounds to be grown on Si substrates patterned with dielectric films. In this work, Si nanoscale areas opened through a SiO2 layer ( < 1 nm) formed on (001) Si have been used to grow GaAs microcrystals by chemical beam epitaxy (CBE) in the temperature range 550–600 ∘C (Renard et al., Appl Phys Lett 102:191915, 2013). Structural, optoelectronic and electrical properties of GaAs microcrystals have been analyzed at room temperature by micro-Raman, photoluminescence and conductive probe atomic force microscopy (CP-AFM). The fine structure of crystals (facet orientations, crystal defects) has also been investigated by transmission electron microscopy (TEM). Linear polarized Raman spectroscopy performed on multiple microcrystals shows exclusively the TO mode which is typically expected for (110) GaAs plane orientations and/or heavily n-type Si-doped GaAs (Zardo et al., Phys Rev B 80:245324, 2009). TEM confirms that all facets are {110}, but unintentionally Si doping cannot be excluded. Indeed, PL measure-ments point out a red shift for the microcrystals for which nucleation seeds were created by silane exposure. CP-AFM imaging of GaAs microcrystals performed at + 1 and − 1 V, respectively, points out a current rectification behavior confirmed by local I–V measure-ments (Fig. 37.1). These results can be interpreted as a sign of the presence of a p-n junction, which agrees well with the p-type doping of Si substrates used in this study (1–5 Ωcm) and the unintentionally n-type doping of GaAs microcrystals suggested by PL measurements (Pavesi and Henini, Microelectron J 28:717–726, 1997).