Chen Xiao-dong

Accurate determination of calibration factor for tidal gravity observation of a GWR-superconducting gravimeter

It is recognized widely nowadays that the superconducting gravimeter (SG) is a kind of best relative gravimeter with high observing precision, good continuity and stability. However, it is necessary to calibrate the direct output (change in voltage) by using scale value (calibration factor) before getting the change of the real gravity field. Studies show that the accuracy of the scale value will influence the late analysis and explanation of the observations. By using absolute gravity measurements of a FG5 absolute gravimeter (AG) at Wuhan international tidal gravity fundamental station (two campaigns each for 3 days) and by using known tidal parameters at the same station, the calibration factors of the SG and their precision are studied in detail in this paper.

Analysis and comparison of the tidal gravity observations obtained with LCR-ET20 spring gravimeter

Based on the tidal gravity observations recorded with LCR-ET20 spring gravimeter at Wuhan international fundamental tidal gravity station, the characteristics of the ET20 and the atmospheric and oceanic gravity signals are studied systematically by using international standard data pre-processing and analysis methods, and by comparing the results with those obtained using superconducting gravimeter (SG) at same station. The numerical results indicate that the identical tidal gravity parameters same as those with the SG are obtained, the instrument can be used effectively to record temporal change of the gravity field, though the accuracy of the ET20 is one order lower than that of the SG, and has also the large drift induced by the spring creep character.

Influences of finite gain bandwidth on pulse propagation in parabolic fiber amplifiers with distributed gain profiles

The evolutions of the pulses propagating in decreasing and increasing gain distributed fiber amplifiers with finite gain bandwidths are investigated by simulations with the nonlinear Schrodinger equation. The results show that the parabolic pulse propagations in both the decreasing and the increasing gain amplifiers are restricted by the finite gain bandwidth. For a given input pulse, by choosing a small initial gain coefficient and gain variation rate, the whole gain for the pulse amplification limited by the gain bandwidth may be higher, which is helpful for the enhancement of the output linearly chirped pulse energy. Compared to the decreasing gain distributed fiber amplifier, the increasing gain distributed amplifier may be more conducive to suppress the pulse spectral broadening and increase the critical amplifier length for achieving a larger output linearly chirped pulse energy.

Power optimization for the datapath of a 32-bit reconfigurable pipelined DSP processor

With the continuous increasing of circuit scale, the problem of power consumption is paid much more attention than before, especially in large designs. In this paper, an experience of optimizing the power consumption of the 16-bit datapath in a 32-bit reconfigurable pipelined Digital Signal Processor (DSP) is introduced. By keeping the old input values and preventing the useless switching of the logic blocks on the datapath, the power consumption is much lowered. At the same time, by relocating some logic blocks between different pipeline stages and employing some data forward logics, a better balanced pipeline is achieved to lower the power consumption for conditional computation instructions at very low timing and area costs. The effectivity of these power optimization technologies are proved by the experimental results. Finally, some ideas about how to reduce the power consumption of circuits are proposed, which are very effective and useful in practice designs, especially in pipelined ones.With the continuous increasing of circuit scale, the problem of power consumption is paid much more attention than before, especially in large designs. In this paper, an experience of optimizing the power consumption of the 16-bit datapath in a 32-bit reconfigurable pipelined Digital Signal Processor (DSP) is introduced. By keeping the old input values and preventing the useless switching of the logic blocks on the datapath, the power consumption is much lowered. At the same time, by relocating some logic blocks between different pipeline stages and employing some data forward logics, a better balanced pipeline is achieved to lower the power consumption for conditional computation instructions at very low timing and area costs. The effectivity of these power optimization technologies are proved by the experimental results. Finally, some ideas about how to reduce the power consumption of circuits are proposed, which are very effective and useful in practice designs, especially in pipelined ones.