Cheng-Yu Hsieh

Improvement of Epitaxy GaN Quality Using Liquid-Phase Deposited Nano-Patterned Sapphire Substrates

A relatively simple and easy and inexpensive liquid-phase deposition (LPD) method is employed to introduce nanoscale silica hemispheres on sapphire substrates for fabricating a nano-patterned sapphire substrate (NPSS). Compared with GaN grown on sapphire without any pattern, the NPSS-GaN film is of much better quality as observed by scanning electron microscopy, transmission electron-microscopy, X-ray diffraction, cathodoluminescence, and photoluminescence. This is because GaN is initiated from the c-plane instead of the LPD-silica surface. In addition, many dislocations within the NPSS-GaN bend toward the patterns, or end at the GaN/void interfaces.

Enhanced Performance of LEDs Using Periodic Tent-Like Post Patterns on A-plane Sapphire Substrates

Periodic tent-like post patterns on a-plane sapphire substrates were fabricated using a two-step etching process. They were denoted as a-plane dot pattern sapphire substrate (ADPSS). Compared with the GaN-based light-emitting diode (LED) grown on a-plane sapphire without any pattern (AFlat), the ADPSS-LED has higher output power, light extraction efficiency (LEE), and external quantum efficiency (EQE), and better crystal quality. The output power of ADPSS-LED was 9.6 mW, which was 68.4% larger than the AFlat-LED. In addition, the blue shift of ADPSS-LED was found to be less than that of AFlat-LED.

Using

Wet-etching pattern sapphire substrates (PSS) have been used to grow GaN-based light-emitting diodes (LEDs). However, after wet etching, several sidewall facets are exposed on the patterns of PSS. These sidewall facets would grow zincblende GaN and form irregular voids. In this letter, BCl3-based plasma is used to solve this problem and improve the performance of GaN-based LEDs.

{\rm BCl}_{3}

The integration of GaAs and Si can combine the superior electrical and optical properties of GaAs with the mechanical and economical advantages of Si. It presents great potential for OEICs applications. In this study, direct wafer bonding was applied to combine bulk p-Si and p-GaAs. Interface morphologies of bonded p-GaAs/p-Si wafers were investigated by TEM.