Chia-Long Wu

Fast modular multi-exponentiation using modified complex arithmetic

Abstract Modular multi-exponentiation ∏ i = 1 n M i E i ( mod N ) is a very important but time-consuming operation in many modern cryptosystems. In this paper, a fast modular multi-exponentiation is proposed utilizing the binary-like complex arithmetic method, complement representation method and canonical-signed-digit recoding technique. By performing complements and canonical-signed-digit recoding technique, the Hamming weight (number of 1’s in the binary representation or number of non-zero digits in the binary signed-digit representations) of the exponents can be reduced. Based on these techniques, an algorithm with efficient modular multi-exponentiation is proposed. For modular multi-exponentiation, in average case, the proposed algorithm can reduce the number of modular multiplications (MMs) from 1.503k to 1.306k, where k is the bit-length of the exponent. We can therefore efficiently speed up the overall performance of the modular multi-exponentiation for cryptographic applications.

Fast exponentiation by folding the signed-digit exponent in half

For modern cryptographic systems, the public key cryptosystem such as RSA requires modular exponentiation (M E mod N). The M, E and N are either as large as the 1024-bit integers or even larger, it is not a very good idea to directly compute M E mod N. Recently, there are many techniques have been invented to solve the time-consuming computations of such time-consuming modular exponentiation. Among these useful algorithms, the “binary (square-and-multiply) algorithm” reduces the amount of modulo multiplications. As the “signed-digit representation algorithm” has the property of the nonzero digit occurrence probability equals to 1/3, taking this advantage, this method can more effectively decrease the amount of modular multiplications. Moreover, by using the technique of recording the common parts in the folded substrings, the “folding-exponent algorithm” can improve the efficiency of the binary algorithm, thus can further decrease the computational complexity of modular exponentiation. In this paper, a new modular exponentiation algorithm is proposed which based on the binary algorithm, signed-digit representation, and the folding-exponent technique. By using the parallel processing technique, in our proposed method, the modular multiplications and modular squaring can be executed in parallel, and thus lower down the computational complexity to k + 3 multiplications. As modular squaring operation over GF(2 n ) is carried out by a simple cyclic right shift operation, the computational complexity of our proposed method can be further reduced to 29k/36 + 3 multiplications.

An efficient Montgomery exponentiation algorithm by using signed-digit-recoding and folding techniques

Abstract The motivation for designing fast modular exponentiation algorithms comes from their applications in computer science. In this paper, a new CSD-EF Montgomery binary exponentiation algorithm is proposed. It is based on the Montgomery algorithm using the canonical-signed-digit (CSD) technique and the exponent-folding (EF) binary exponentiation technique. By using the exponent-folding technique of computing the common parts in the folded substrings, the same common part in the folding substrings can be simply computed once. We can thus improve the efficiency of the binary exponentiation algorithm by decreasing the number of modular multiplications. Moreover, the “signed-digit representation” has less occurrence probability of the nonzero digit than binary number representation. Taking this advantage, we can further effectively decrease the amount of modular multiplications and we can therefore decrease the computational complexity of modular exponentiation. As compared with the Ha–Moon’s algorithm 1.261718m multiplications and the Lou-Chang’s algorithm 1.375m multiplications, the proposed CSD-EF Montgomery algorithm on average only takes 0.5m multiplications to evaluate modular exponentiation, where m is the bit-length of the exponent.

An efficient Montgomery exponentiation algorithm for public-key cryptosystems

The well-know binary method is a generally acceptable method for modular exponentiation in public-key cryptosystems. In this paper, we propose a new binary exponentiation algorithm, which is based on common-multiplicand method, Montgomery modular reduction algorithm, signed-digit recoding technique, and binary exponentiation algorithm. The common-multiplicand technique is developed to solve the problem common-multiplicand multiplications, i.e., the same common part in two modular multiplications can be computed once rather twice. The ldquosigned-digit recodingrdquo has less occurrence probability of the nonzero digit than binary representation. Due to this advantage, we can efficiently lower down the amount of modular multiplications and we can therefore decrease the computational complexity of modular exponentiation. By using the proposed algorithm, the total number of multiplications can be reduced by about 66.7% as compared with the original Montgomery modular reduction algorithm.

Parallel exponentiation using common-multiplicand-multiplication and signed-digit-folding techniques

An efficient computation of the modular exponentiations C = ME mod N is very useful for public-key cryptosystems. In this paper, an efficient parallel modular exponentiation algorithm is proposed based on both the common-multiplicand-multiplication (CMM) and signed-digit-folding (SDF) techniques. The ‘minimal-signed-digit (SD) recoding algorithm’ has less occurrence probability of the nonzero digit than the binary number representation. Taking this advantage, we can effectively decrease the amount of modular multiplications. By dividing the bit string of the minimal-SD recoding exponent E into three equal-length parts and by using the technique of recording the common parts in the folded substrings, the ‘folding-exponent algorithm’ can improve the efficiency of the binary algorithm, thus it can further decrease the computational complexity of modular exponentiation. As the modular squaring operation in GF(2 n ) over the normal basis can be done by a simple shift operation, the modular multiplications and the modular squaring operations in our proposed CMM–SDF algorithm can be executed in parallel. By using our proposed parallel CMM–SDF algorithm, we can obtain the optimal overall computational complexity as 0.689k + 11 multiplications by folding the minimal-SD recoding exponent E exactly one-time in SD radix-2 recoding system, where k denotes the digit-length of the exponent and n denotes the folding time of the exponent.

Fast modular multiplication based on complement representation and canonical recoding

Modular multiplication is the fundamental operation in implementing circuits for cryptosystem, as the process of encrypting and decrypting a message requires modular exponentiation that can be decomposed into multiplications. In this paper, a proposed multiplication method utilizes the complement recoding method and canonical recoding technique. By performing the complement representation method and canonical recoding technique, the number of partial products can be further reduced. Based on these techniques, an algorithm with efficient multiplication method is proposed. For multiplication operation, in average case, the proposed algorithm can reduce the number of k-bit additions from 1/4k+(log (k)/k)+5/2 to 1/6k+(log (k)/k)+5/2, where k is the bit length of the multiplicand and multiplier. Besides, if we perform the proposed technique to compute common-multiplicand multiplication, the computational complexity can reduce the number of k-bit additions from 1/2k+2×(log (k)/k)+5 to 1/3k+2×(log (k)/k)+5. We can, therefore, efficiently speed up the overall computing performance of the multiplication operation.

Fast exponentiation based on common-multiplicand-multiplication and minimal-signed-digit techniques

In this paper, an improved common-multiplicand-multiplication algorithm is proposed, utilizing the binary exponentiation method and minimal-signed-digit recoding technique for fast exponentiation. By adopting the recoding technique on the common signed-digit representations in the grouped exponent substrings, the proposed algorithm provides an efficient exponentiation method. The proposed algorithm achieves better performance in modern exponentiation methods by decreasing the overall computational complexity. In particular, the proposed method is very suitable for parallel processing systems to improve the efficiency of exponentiation operation.

A low-complexity LUT-based squaring algorithm

The computation of large modular multi-exponentiation is a time-consuming arithmetic operation used in cryptography. The standard squaring algorithm is well-known and the Guajardo-Paar algorithm fixes the improper carry handling bug produced by the standard squaring algorithm, but produces error-indexing bug. In this paper, a novel squaring algorithm is proposed, which stores base products in the Look-Up Table before the squaring computation and base size comparison method. The proposed algorithm can not only evaluate squaring efficiently but also avoid bugs produced in other proposed algorithms (the Guajardo-Paar algorithm and the Yang-Heih-Laih algorithm). The performance of the proposed algorithm is 1.615 times faster than the standard squaring algorithm and much faster than other algorithms.

Fast binary multiplication by performing dot counting and complement recoding

Abstract In this paper, we present a new computation method by combining the dots counting method and the complement recoding method to efficiently evaluate modular multiplication in binary multiplications. The LUT (Look-Up Table) technique can be adopted in our proposed method to efficiently reduce the number of multiplications. And the proposed method can be easily implemented for the hardware. Numerous examples are provided to show the efficient and easy operations of the binary multiplication method. In average case, the worst case for the Hamming weight of the product X ∗ Y is uv 4 , where u is the bit-length of multiplicand X , v is the bit-length of multiplier Y . If the proposed method is applied, we could effectively reduce the Hamming weight of the product X ∗ Y to 0.25 u .

Fast Modular Multiplication for E-Commerce Cryptosystem

The performance of the modular multiplication is the core arithmetic of the RSA cryptosystem for e-commerce security. In this paper we present a novel technique for modular multiplication by performing complements on the multiplicand and partitioning the key size of the multiplier. By applying the modular arithmetic and complement technique to the Montgomery algorithm, we propose an efficient modular multiplication method that requires exactly 50% multiplications comparing to Lee-Jeong-Kwons algorithm.