Chien Ping Wang

Analysis of thermal characteristics and mechanism of degradation of flip-chip high power LEDs

Abstract The purpose of this study is to investigate the thermal behavior at the die-attached interfaces of flip-chip GaN high-power light emitting diodes (LEDs) using a combination of theoretical and experimental analyses. The results indicate that contact thermal resistance increased dramatically at the die-attached interfaces with aging time and stress, degrading the luminous flux. The junction temperature and thermal uniformity of the flip-chip structure both strongly depend on the arrangement of gold bumps. Local hot spots effectively reduce light output under high electric and thermal stress, influencing the long-term performance of the LED device. The results were validated using finite element analysis and in experiments using an infrared and an emission microscope. A two-step thermal transient degradation mode was identified under various aging stresses. A simulation further optimized the bump configuration that was associated to yield a low junction temperature and high temperature uniformity of the LED chip. Accordingly, the results are helpful in enhancing the performance and reliability of high-power LEDs.

Transient Analysis of Partial Thermal Characteristics of Multistructure Power LEDs

The performance of a high-power light-emitting diode (LED) strongly depends on the effectiveness of thermal management. Electrical, thermal, and optical measurements were combined to analyze the complex thermal structure and interface effects inside the LED package. Thermal network synthesis and 3-D finite element modeling simulations are used to simulate the heat flow path and temperature gradient from junction to environment. The exponential curve is applied to model the radiant flux and thermal resistance as a function of heating power. In addition, the results of peak wavelength obviously indicate the blue-shifted phenomena with driving current due to band filling effect and tend to be saturated when the injection current is higher than 0.5 A. The radiant flux showed the opposite behavior as driving current increases. Results demonstrated that partial thermal characteristics of the chip, die-attached layer, and heat slug can be determined individually in the LED packages.

Thermal Analysis of Eutectic Flip-Chip Light-Emitting Diodes Fabricated Using Copper-Coated Ceramic Substrate

Die attachment quality plays a remarkable role in producing highly reliable solid-state lighting fixtures by providing a dominant impact on thermal resistance. Color rendering, efficacy, and lifetime are strongly related to junction temperature. This paper investigated the effects of varying the thickness of sputter-coated copper on an Al2O3 ceramic substrate on the thermal resistance and luminous intensity of flip-chip light-emitting diode (LED) devices. Eutectic bonding was applied to provide excellent bonding strength and low void content between the chip and ceramic substrate. The thermal resistance dramatically decreased as the copper thickness was reduced because of a substantial reduction in the conduction impedance for heat dissipation from the junction to the ambient. The luminous intensity was improved by reducing the copper thickness as the driving current was increased from 50 to 700 mA. The results demonstrated that reducing the copper thickness effectively reduced the junction temperature and improved the performance of the eutectic flip-chip bonding LED devices.

Variation of Electrostatic Discharge Robustness Induced by the Surface Morphology of High Power Light-Emitting Diodes

The capability of high-power nitride-based light-emitting diodes (HPLED) to withstand electrostatic discharge (ESD) is very important key index due to the horizontal structure of the insulating property of the sapphire substrate. Accordingly, the investigation of ESD failure mechanisms is a beneficial topic. However, it is difficult to real-time monitor the damage caused by the ESD stress because it occurred in a very short period. Before the series ESD stress, atomic force microcopy (AFM) and conductive AFM (C-AFM) were applied to explore the correlation between surface morphology and electrical properties of LED chips. Furthermore, after the series ESD stress, transmission electron microscopy (TEM) was used to investigate the failure modes and compare to the distribution of the surface current observed by C-AFM. These findings suggest that the V-shaped defect and surface morphology are strong correlate to the endurance of ESD stress.

Study of metals by femtosecond laser processing for electro-optics applications

Femtosecond laser (FS-laser) microstructuring of metals has become a promising tool because of its non-contact nature, which allows the micromachining and direct processing of materials with a minimized volume of heat-affected zone for electro-optics applications such as light emitting diodes (LED) and solar photovoltaic (PV) lighting. This study presents ultra-short pulse (10-15 sec) FS-laser processing. Through integrating the laser source, optical system and dynamic control modules, the materials of metals with micro-scale or nanoscale structures can be fabricated. In traditional processing such as semiconductor processing, development, exposure and etching necessitate expensive equipment and time-consuming tasks. With FS-laser processing, high-precision patterns are obtained, which will be a great benefit to keeping costs down. In this study, the wavelengths of FS-laser ablation are employed using visible and infrared light. To make a breakthrough in electro-optics processes, the CIGS thin-film of solar cells in metal process can be easily produced by the FS-laser. The ablation speed of the FS-laser for thin film layer CIGS solar cells can reach 2000 mm/s which is faster than the current Nd:YAG laser machine (~1000 mm/s). On the other hand, the minimum size of metal lines can be controlled to a value that is lower than 40 µm. Furthermore, green energy can be effectively developed for the future.

Accelerated Degradation of High Power Light-Emitting Diode Resulted from Inhomogeneous Current Distribution

The uniformity of current spreading is one of the key points to inspect the reliability and endurance of InGaN-based light-emitting diodes. In this paper, we propose an effective circuit model to analyze the phenomenon of premature turn-on diodes in the active layer. With the aging tests and novel investigation of failure analyses, the simulating results are good agreement with experimental data. It is found that an inhomogeneous distribution of forward current in light-emitting diode chips, as measured by conductive atomic force microscopes, provides the evidence that V-shaped defects and the associated threading dislocations are electrically active. Furthermore, the results of emission microscopy images and transmission electron microscope reviews support the assumption that the threading dislocations associated with V-shaped defects behave as very small shunt resistors connected across p–n junction. This study provides a degradation mechanism to realized one of the failure modes of high power light-emitting diodes.