Chien-Yi Huang

Sequencing single-machine tardiness problems with sequence dependent setup times using an iterated greedy heuristic

The single-machine tardiness problem with sequence dependent setup times is a core topic for scheduling studies. Tardiness is actually a difficult criterion to deal with, even in a relatively simple manufacturing system, such as a single-machine is strongly NP-hard. Motivated by the computational complexity of this problem, a simple iterated greedy (IG) heuristic is proposed to solve it. To validate and verify the proposed IG heuristic, computational experiments were conducted on three benchmark problem sets that included weighted and un-weighted tardiness problems. The experiment results clearly indicate that the proposed IG heuristic is highly effective as compared to the state-of-the-art meta-heuristics on the same benchmark instances. In terms of both solution quality and computational expense, this study successfully develops an effective and efficient approach for single-machine total tardiness problems with sequence dependent setup times.

Minimising makespan in distributed permutation flowshops using a modified iterated greedy algorithm

The distributed permutation flowshop scheduling problem (DPFSP) is a newly proposed topic in the shop scheduling field, which has important application in globalised and multi-plant environments. This study presents a modified iterated greedy (MIG) algorithm for this problem to minimise the maximum completion time among all the factories. Compared with previous approaches, the proposed algorithm is simpler yet more effective, more efficient, and more robust in solving the DPFSP. To validate the performance of the proposed MIG algorithm, computational experiments and comparisons are conducted on an extended benchmark problem set of Taillard. Despite its simplicity, the computational results show that the proposed MIG algorithm outperforms all existing algorithms, and the best-known solutions for almost half of instances are updated. This study can be offered as a contribution to the growing body of work on both theoretically and practically useful approaches to the DPFSP.

Multiprocessor task scheduling in multistage hybrid flowshops: A hybrid artificial bee colony algorithm with bi-directional planning

In this paper, the problem of scheduling multistage hybrid flowshops with multiprocessor tasks is contemplated. This is a strongly NP-hard problem for which a hybrid artificial bee colony (HABC) algorithm with bi-directional planning is developed to minimize makespan. To validate the effectiveness of the proposed algorithm, computational experiments were tested on two well-known benchmark problem sets. The computational evaluations manifestly support the high performance of the proposed HABC against the best-so-far algorithms applied in the literature for the same benchmark problem sets.

The solder paste printing process: critical parameters, defect scenarios, specifications, and cost reduction

Purpose – The purpose of this paper is to comprehensively explore the effects of critical parameters on solder deposition and to establish a systematic approach for determining guidelines for solder paste inspection (SPI) workstations.Design/methodology/approach – This study explored the effects of process parameters, stencil and printed circuit board designs on solder deposition and identified the major post‐reflow defect scenarios. Through the investigation of correlation between the results of SPI analysis and post‐reflow defective scenarios, SPI specifications are suggested for minimizing the total cost of poor quality.Findings – The higher the printing pressure the lower the solder deposition. There was a significant difference in solder deposition between the front squeegee and the rear squeegee. Insufficient distance between the stencil aperture and the initial printing location resulted in irregular solder paste and variations in solder deposition. A stencil with a higher area ratio resulted in gr...

Sn–Cu–Ni Soldering Process Optimization Using Multivariate Analysis

One lead free solder candidate, Sn-Ag-Cu305 (Sn96.5/Ag3.0/Cu0.5), has come into widespread use as a replacement for traditional tin-lead solder (Sn63/Pb37). However, the price of silver has increased dramatically in recent years. This has increased manufacturing costs, impacting firm competitiveness. This paper evaluates the performance of the low cost Sn-Cu-Ni solder alloy used for wave soldering. Sample products for several applications are used to assess critical factors in the wave soldering process. A principal component analysis was performed in this paper to integrate multiple quality characteristics, namely assembly yield and solder joint strength, for process development. As a result, a parameter combination of 270 soldering temperature and 8 s dwell time is recommended. A test vehicle with daisy-chain circuitry design is used to investigate the performance of samples prepared by the optimal process. Samples are subject to the thermal cycling test. The performance of the recommended process is therefore verified.

Package-on-Package Assembly Yield Assessment in the ODM/EMS Environment Using Monte Carlo Simulation

Package-on-package (PoP) is one of the major manufacturing strategies for achieving an electronic component miniaturization. Achieving a desired process yield is critical to maintaining competitiveness. This paper develops a scientific approach to assess the PoP assembly yield in both the x- y in-plane and the z-direction using a Monte Carlo simulation. Influences of variations of materials such as components and printed circuit boards (PCBs) are investigated. Equipment accuracy and different process strategies are also under consideration. The scenarios under which defects occur are defined through the geometric phenomena, process incidence, and theoretical inferences. Defects such as shorts and soldering open may occur after reflow soldering if there is an excessive amount of offset between the centers of the solder ball and the bonding pad during the component placement stage. The amount of component/PCB warpage during the reflow heating and coplanarity of the solder balls beneath the substrate will also impact the package stacking yield. The simulation-based design for experiment is employed to investigate the effects of soldering materials, stencil thickness, reflow temperature profile, and component ball height variation on the assembly yield. The optimal materials and process combinations are then identified.

Applying CHAID algorithm to investigate critical attributes of void formation in QFN assembly

Purpose – The purpose of this paper is to employ data mining as a new diagnosing scheme for investigating void formation to the thermal pad in quad flat non‐lead (QFN) assembly. Occurrences of voiding in various scenarios of component design, materials selection and manufacturing process are analyzed.Design/methodology/approach – This research investigates the process yield of a PCB assembly for a handheld device in the electronics manufacturing industry using the chi‐square automatic interaction detection (CHAID) algorithm and chi‐square test. Practical data generated by an X‐ray apparatus from the shop floor are collected. The critical attributes to the void formation (in the solder joint) of the QFN component are identified.Findings – Stocking the PCB material beyond ten days may increase the level of voiding by 1%. Using PCB provided by vendor U helps decrease the level of voiding by 1.6%. Stocking the component material above 43 days may increase the level of voiding by 1.9%. In addition, reflow sold...

Developing a Rework Process for Underfilled Electronics Components via Integration of TRIZ and Cluster Analysis

This paper integrates the theory of inventive problem solving and cluster analysis to develop effective rework processes for underfilled electronic components. First, the function analysis is used to clarify the functional disadvantages such as underfill material attaching to the component, the printed circuit board (PCB), and the solder joints during the rework process. The cause-effect contradiction chain analysis then helps to identify engineering contradictions. Second, this research proposes clustered contradiction matrix. The optimal number of clusters for the inventive principles is determined by Wards method of hierarchical approach. The K-means method is then used to allocate the engineering parameters to the appropriate cluster to achieve superior clustering performance. The priority of inventive principles considered as solution triggers is based on their corresponding frequency of appearances. Three solutions focused laser beam to remove electronics component, dispensable component bracket, and interchangeable PCB are proposed to rework the underfilled electronics components. Finally, the idealities of solutions are assessed and the most ideal solution interchangeable PCB is nominated for the U.S. patent.

A grey-ANN approach for optimizing the QFN component assembly process for smart phone application

Purpose This paper aims to propose an innovative parametric design for artificial neural network (ANN) modeling for the multi-quality function problem to determine the optimal process scenarios. Design/methodology/approach The innovative hybrid algorithm gray relational analysis (GRA)-ANN and the GRA-Entropy are proposed to effectively solve the multi-response optimization problem. Findings Both the GRA-ANN and the GRA-Entropy analytical approaches find that the optimal process scenario is a stencil aperture of 57 per cent and immediate processing of the printed circuit board after exposure to a room environment. Originality/value A six-week confirmation test indicates that the optimal process has improved quad flat non-lead assembly yield from 99.12 to 99.78 per cent.

Intelligent Parametric Design for a Robust LED Encapsulation Process

Light-emitting diodes (LEDs) have been adopted in a wide variety of lighting situations. As lighting technology evolves, illumination devices are moving toward miniaturization and high-power applications. Packaging of illumination devices is essential to providing a path for heat dispersion. A full understanding of the viscosity change of the encapsulation material is critical to ensure manufacturability and improved process yield. The typical viscosity model is the initial viscosity plus the change in viscosity over time at a given temperature. The change in viscosity is a function of the reaction rate and the pro-exponential factor. This paper includes the pro-exponential factor in the regression model to improve the prediction accuracy. Through experimental data, the materials viscosity is determined as a function of process temperature, the ratio of the curing agent, and the curing time. A computer-aided parametric design is used to assess the effect of the variation of individual factors on the quality function and proposes a robust LED encapsulation process. An artificial neural network that considers interactions between parameters and establishes fitness functions is used to further enhance the accuracy of predictions and determine the optimal process solution through an iterative training algorithm. The optimal process scenario suggested by this research is a 10% curing agent preheated at 333°K for 40 min. This robust process can improve the signal-to-noise ratios by approximately 43%.