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Dive into the research topics where Chihoon Lee is active.

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Featured researches published by Chihoon Lee.


Journal of Vacuum Science & Technology B | 2004

Nitrogen incorporation engineering and electrical properties of high-k gate dielectric (HfO2 and Al2O3) films on Si (100) substrate

Chihoon Lee; Jihoon Choi; Moonju Cho; Jahoo Park; Cheol Seong Hwang; Hyeong Joon Kim; Jaehack Jeong

Pt/HfO2, HfO2–Al2O3, or Al2O3–HfO2–Al2O3/p-type Si (100) metal oxide semiconductor capacitors, which were fabricated using an atomic-layer-deposition technique, were post-deposition annealed under a NH3 atmosphere in order to investigate the nitrogen incorporation behavior along with their influences on the electrical properties. X-ray photoelectron spectroscopy showed that the binding energy of Hf 4f peak shifts to the lower values with increasing PDA temperature due to the formation of Hf–N bonds. An amorphous Al2O3 interface layer suppressed N diffusion into the Si substrate. The rapid thermally annealed HfO2–Al2O3 film at 800 °C for 30 s, which contained approximately 20 at. % N in the HfO2 layer, showed a flat-band voltage shift of ∼30 mV (corresponding to a negative fixed charge ∼1.6×1011 cm−2), a leakage current density of −4.7×10−10 A/cm2 at −1 V, a hysteresis voltage <20 mV, excellent charge-to-breakdown characteristics and the lowest surface roughness. The single layer HfO2 film did not demonstr...


Japanese Journal of Applied Physics | 2003

Deep Submicron CMOS Technology Using Top-Edge Round STI and Dual Gate Oxide for Low Power 256 M-Bit Mobile DRAM

Chihoon Lee; Donggun Park; Namhyuk Jo; Chanseong Hwang; Hyeong Joon Kim; Wonshik Lee

A new combination process, which consists of the pad oxide undercut to smoothen the active top-edge of the shallow trench isolation (STI) and the dual gate oxidation, was investigated for a 256 M-bit mobile dynamic random access memory (DRAM) with VD 1.8 V. An IDSAT of a thin oxide transistor (5.0 nm thickness) with a dual gate oxide (DGOX) increased by >12% compared to that with a single gate oxide (SGOX, 6.5 nm thickness). It was also found that the boron doses of the thin oxide transistor with the DGOX increased by >30% and >45% for the n-channel metal oxide semiconductor field effect transistor (nMOSFET) and p-channel MOSFET (pMOSFET), respectively, in order to obtain the same threshold voltage (Vth) as that with the SGOX due to a decrease of oxide thickness and the segregation of boron into either the Si/SiO2 interface or the SiO2 layer for a longer gate oxidation time. The refresh characteristics of the 256 M-bit mobile DRAM, fabricated with new combination process, were greatly improved compared to that with the SGOX transistors due to a decrease in the gate induced drain leakage current, an electrical stress release and the STI top-edge corner rounding in the cell array.


Electrochemical and Solid State Letters | 2006

Dopant Penetration Behavior of B-Doped P + Polycrystalline- Si0.73Ge0.27 ∕ Al2O3 or AlN – Al2O3 ∕ n-Si Metal Insulator Semiconductor Capacitors

Chihoon Lee; Jaehoo Park; Moonju Cho; Sug Hun Hong; Cheol Seong Hwang; Hyeong Joon Kim; Jaehack Jeong

B-doped p + polycrystalline-silicon (poly-Si) or silicon germanium (poly-Si 0.73 Ge 0.27 ) gate/Al 2 O 3 or top nitrogen incorporated Al 2 O 3 (N-Al 2 O 3 )/n-type Si(100) metal insulator semiconductor capacitors were fabricated using atomic layer deposition for the Al 2 O 3 or AlN/Al 2 O 3 layer to investigate B penetration and device reliability. The adoption of a poly-Si 0.73 Ge 0.27 electrode greatly reduced the B penetration into the substrate through the Al 2 O 3 layer and enhanced the activation of the implanted dopant compared to the poly-Si electrode under a given activation annealing condition. The acquired work function engineering by the poly-Si 0.73 Ge 0.27 electrode also reduced the threshold voltage of the device. Deposition of a thin AlN layer on top of the Al 2 O 3 layer further reduced the B diffusion into the dielectric which greatly enhanced the dielectric reliability. The poly-Si 0.73 Ge 0.27 (N-Al 2 O 3 )/n-type Si capacitors showed the smallest leakage current density of 3.0 X 10 -7 A/cm 2 at 1 V and a large charge-to-breakdown value of 8.5 C/cm 2 .


Microelectronics Reliability | 2003

Electrical reliability of highly reliable 256M-bit mobile DRAM with top-edge round STI and dual gate oxide

Chihoon Lee; Donggun Park; Hyeong Joon Kim; Wonshik Lee

Abstract A n ovel CMOS fabrication process with a d ual g ate o xide (NDGO, thin oxide 5.0 nm, thick oxide 7.8 nm) and a shallow trench isolation (STI) top-edge rounded by a pad oxide undercut was developed for a 256M-bit mobile dynamic random access memory (DRAM) with V D =1.8 V. We present a comprehensive study on the I – V characteristics and the long-term reliability of CMOSFET fabricated by NDGO process, and compared these characteristics with those of conventional single gate oxide transistors with a gate oxide thickness 5.0–7.5 nm. While thin oxide nMOSFET have a threshold voltage of nMOSFET ( V thn ) of between 0.70 and 0.72 V and a saturation current ( I DSAT ) of between 280 and 300 μA/μm, thick oxide nMOSFET have a V thn of between 0.85 and 0.90 V and an I DSAT of between 160 and 200 μA/μm in NDGO process due to a difference in the gate oxide thickness at similar boron doses. A 10 year lifetime of thick oxide cell transistors is projected for a V g =8.9 V due to an electrical stress release at the STI top-edge round improved by the pad oxide undercut. The hot carrier lifetime and hot electron induced punchthrough also showed good characteristics. Consequently, this NDGO process is able to provide a reliable transistor performance for a 256M-bit mobile DRAM operating at low power.


Integrated Ferroelectrics | 2007

Investigation on Resistive Memory Switching Mechanism of NiO

Daesig Kim; Sunae Seo; D.-S. Suh; R. Jung; Chihoon Lee; J. K. Shin; I. K. Yoo; I. G. Baek; Hee-seok Kim; E. K. Yim; Su-Jin Park; Hyun-Su Kim; U-In Chung; Joo Tae Moon; B. I. Ryu; Jung-Tae Kim; Bae Ho Park

ABSTRACT Experimental investigations on the resistive memory switching in sub-micron sized NiO memory cell are presented to elucidate the resistive memory switching mechanism. The voltage or current-biased I-V measurements show that the resistive switching transitions can be regarded as the combination of a voltage-controlled negative differential resistance phenomenon and a current-controlled negative differential resistance phenomenon. Along with experimental observations of multiple resistance states, these indicate that the memory switching in NiO would come from the percolative formation and rupture of filamentary conducting paths. Pulse experiments further suggest that the memory switching would come from local domains inside filaments.


Integrated Ferroelectrics | 2005

BORON DIFFUSION PROPERTIES AND ELECTRICAL CHARACTERISTICS OF p+ Poly-Si0.73Ge0.27/AlNx/Al2O3/AlNx/n-Si (100) USING IN-SITU ALD

Chihoon Lee; Cheol Seong Hwang; Hyeong Joon Kim

ABSTRACT Boron (B)-doped p+ polycrystalline-silicongermanium (poly-Si0.73Ge0.27) gate/AlNx/ Al2O3/AlNx/n-Si metal-oxide-semiconductor (MOS) capacitors were fabricated in order to improve the blocking properties of B diffusion into the surface of an Al2O3 film and the Si substrate by using in-situ atomic-layer-deposited (ALD) AlNx. The AlNx/Al2O3/AlNx stack film exhibited slightly better B diffusion-blocking properties as a result of the AlNx layers in the top and bottom interface layers of the Al2O3 film. The B-doped poly-Si0.73Ge0.27 gate/AlNx/Al2O3/AlNx/n-Si MOS capacitors had a lower current density of 3.8 × 10−7A/cm2 at 1 V and a better reliability with an equivalent oxide thickness (Eot) of 2.45 nm due to the lower level of B penetration as a result of the AlNx and nitrogen incorporated interfacial silicon oxide (SiOxNy) layers and the enhanced thermal stability.


Archive | 2012

Method for operating user functions based on eye tracking and mobile device adapted thereto

Kyungdae Park; Jiyoung Kang; Sanghyuk Koh; Mijung Park; Saegee Oh; Chihoon Lee


Archive | 2001

Fuse area structure having guard ring surrounding fuse opening in semiconductor device and method of forming the same

Eun-young Minn; Young-hoon Park; Chihoon Lee; Myoung-hee Han


Archive | 2003

Integrated circuit chip having anti-moisture-absorption film at edge thereof and method of forming anti-moisture-absorption film

Eun-young Minn; Young-hoon Park; Chihoon Lee; Hyo-dong Ban


Archive | 2013

Portable electronic device displaying transitional graphical user interface

Jihye Myung; Bong-Hee Kim; Taeyeon Kim; Khai Sanghyuk Koh; Hyemi Lee; Chihoon Lee

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Hyeong Joon Kim

Seoul National University

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