Christian de Schryver

An Energy Efficient FPGA Accelerator for Monte Carlo Option Pricing with the Heston Model

Today, pricing of derivates (particularly options) in financial institutions is a challenge. Besides the increasing complexity of the products, obtaining fair prices requires more realistic (and therefore complex) models of the underlying asset behavior. Not only due to the increasing costs, energy efficient and accurate pricing of these models becomes more and more important. In this paper we present - to the best of our knowledge - the first FPGA based accelerator for option pricing with the state-of-the-art Heston model. It is based on advanced Monte Carlo simulations. Compared to an 8-core Intel Xeon Server running at 3.07GHz, our hybrid FPGA-CPU-system saves 89% of the energy and provides around twice the speed. The same system reduces the energy consumption per simulation to around 40% of a fully-loaded Nvidia Tesla C2050 GPU. For a three-Virtex-5 chip only accelerator, we expect to achieve the same simulation speed as a Nvidia Tesla C2050 GPU, by consuming less than 3% of the energy at the same time.

A New Hardware Efficient Inversion Based Random Number Generator for Non-uniform Distributions

For numerous computationally complex applications, like financial modelling and Monte Carlo simulations, the fast generation of high quality non-uniform random numbers (RNs) is essential. The implementation of such generators in FPGA-based accelerators has therefore become a very active research field. In this paper we present a novel approach to create RNs for different distributions based on an efficient transformation of floating-point inputs. For the Gaussian distribution we can reduce the number of slices needed by up to 48\% compared to the state-of-the-art while achieving a higher output precision in the tail region. Our architecture produces samples up to

A hardware efficient random number generator for nonuniform distributions with arbitrary precision

8.37\sigma

Mixed precision multilevel Monte Carlo on hybrid computing systems

and achieves 381MHz. We also present a comprehensive testing methodology based on stochastic analysis and verification in practical applications.

A multi-level Monte Carlo FPGA accelerator for option pricing in the Heston model

Nonuniform random numbers are key for many technical applications, and designing efficient hardware implementations of nonuniform random number generators is a very active research field. However, most state-of-the-art architectures are either tailored to specific distributions or use up a lot of hardware resources. At ReConFig 2010, we have presented a new design that saves up to 48% of area compared to state-of-the-art inversion-based implementation, usable for arbitrary distributions and precision. In this paper, we introduce a more flexible version together with a refined segmentation scheme that allows to further reduce the approximation error significantly. We provide a free software tool allowing users to implement their own distributions easily, and we have tested our random number generator thoroughly by statistic analysis and two application tests.

FPGA Based Accelerators for Financial Applications

Nowadays, high-speed computations are mandatory for financial and insurance institutes to survive in competition and to fulfill the regulatory reporting requirements that have just toughened over the last years. A majority of these computations are carried out on huge computing clusters, which are an ever increasing cost burden for the financial industry. There, state-of-the-art CPU and GPU architectures execute arithmetic operations with pre-defined precisions only, that may not meet the actual requirements for a specific application. Reconfigurable architectures like field programmable gate arrays (FPGAs) have a huge potential to accelerate financial simulations while consuming only very low energy by exploiting dedicated precisions in optimal ways. In this work we present a novel methodology to speed up multilevel Monte Carlo (MLMC) simulations on reconfigurable architectures. The idea is to aggressively lower the precisions for different parts of the algorithm without loosing any accuracy at the end. For this, we have developed a novel heuristic for selecting an appropriate precision at each stage of the simulation that can be executed with low costs at runtime. Further, we introduce a cost model for reconfigurable architectures and minimize the cost of our algorithm without changing the overall error. We consider the showcase of pricing Asian options in the Heston model. For this setup we improve one of the most advanced simulation methods by a factor of 3-9x on the same platform.

Energy efficient acceleration and evaluation of financial computations towards real-time pricing

The increasing demand for fast and accurate product pricing and risk computation together with high energy costs currently make finance and insurance institutes to rethink their IT infrastructure. Heterogeneous systems including specialized accelerator devices are a promising alternative to current CPU and GPU-clusters towards hardware accelerated computing. It has already been shown in previous work that complex state-of-the-art computations that have to be performed very frequently can be sped up by FPGA accelerators in a highly efficient way in this domain. A very common task is the pricing of credit derivatives, in particular options, under realistic market models. Monte Carlo methods are typically employed for complex or path dependent products. It has been shown that the multi-level Monte Carlo can provide a much better convergence behavior than standard single-level methods. In this work we present the first hardware architecture for pricing European barrier options in the Heston model based on the advanced multi-level Monte Carlo method. The presented architecture uses industry-standard AXI4-Stream flow control, is constructed in a modular way and can be extended to more products easily. We show that it computes around 100 millions of steps in a second with a total power consumption of 3.58 W on a Xilinx Virtex-6 FPGA.

A systematic methodology for analyzing closed-form Heston pricer regarding their accuracy and runtime

This book covers the latest approaches and results from reconfigurable computing architectures employed in the finance domain. So-called field-programmable gate arrays (FPGAs) have already shown to outperform standard CPU- and GPU-based computing architectures by far, saving up to 99% of energy depending on the compute tasks. Renowned authors from financial mathematics, computer architecture and finance business introduce the readers into todays challenges in finance IT, illustrate the most advanced approaches and use cases and present currently known methodologies for integrating FPGAs in finance systems together with latest results. The complete algorithm-to-hardware flow is covered holistically, so this book serves as a hands-on guide for IT managers, researchers and quants/programmers who think about integrating FPGAs into their current IT systems.

HyPER: A runtime reconfigurable architecture for monte carlo option pricing in the Heston model

Modern financial markets are as vivid as never before. Asset prices - and therefore the prices of all related financial products - change within several milliseconds nowadays. However, not only due to the financial crisis in 2008, calculating fair and meaningful prices for these products is much more important than in the past. In order to obtain reliable prices, sophisticated simulation models have to be used. Pricing in these models in general has a very high computational complexity and can in many cases only be approximately done by using numerical methods. On the other hand, we all know that energy costs will become more and more significant in the future. The gap between the increasing computational complexity and the consumed energy can only be bridged by using more tailored computation engines, like dedicated hardware accelerators or application specific instruction set processors (ASIPs). In this paper we present a comprehensive methodology for the efficient design of optimal hardware accelerators and the evaluation thereof. We give two case studies: a new hardware random number generator for arbitrary distributions and a dedicated hardware accelerator for calculating European barrier option prices.

High-Performance Hardware Acceleration of Asset Simulations

Calibration methods are the heart of modeling any financial process. While for the Heston model (semi) closed-form solutions exist for calibrating to simple products, their evaluation involves complex functions and infinite integrals. So far these integrals can only be solved with time-consuming numerical methods. For that reason, calibration consumes a large portion of available compute power in the daily finance business and it is worth checking for the most optimal available methods with respect to runtime and accuracy.However, over the years more and more theoretical and practical subtleties have been revealed and today a large number of approaches are available, including dierent formulations of closed-formulas and various integration algorithms like quadrature or Fourier methods. Currently there is no clear indication which pricing method should be used for a specific calibration purpose with additional speed and accuracy constraints. With this publication we are closing this gap. We derive a novel methodology to systematically find the best methods for a well-defined accuracy target among a huge set of available methods. For a practical setup we study the available popular closed-form solutions and integration algorithms from literature. In total we compare 14 pricing methods, including adaptive quadrature and Fourier methods. For a target accuracy of 10-3 we show that static Gauss-Legendre are best on CPUs for the unrestricted parameter set. Further we show that for restricted Carr-Madan formulation the methods are 3.6x faster. We also show that Fourier methods are even better when pricing at least 10 options with the same maturity but dierent strikes.