Christian Kallesøe

In Situ TEM Creation and Electrical Characterization of Nanowire Devices

We demonstrate the observation and measurement of simple nanoscale devices over their complete lifecycle from creation to failure within a transmission electron microscope. Devices were formed by growing Si nanowires, using the vapor-liquid-solid method, to form bridges between Si cantilevers. We characterize the formation of the contact between the nanowire and the cantilever, showing that the nature of the connection depends on the flow of heat and electrical current during and after the moment of contact. We measure the electrical properties and high current failure characteristics of the resulting bridge devices in situ and relate these to the structure. We also describe processes to modify the contact and the nanowire surface after device formation. The technique we describe allows the direct analysis of the processes taking place during device formation and use, correlating specific nanoscale structural and electrical parameters on an individual device basis.

Measurement of local Si-nanowire growth kinetics using in situ transmission electron microscopy of heated cantilevers.

A technique to study nanowire growth processes on locally heated microcantilevers in situ in a transmission electron microscope has been developed. The in situ observations allow the characterization of the nucleation process of silicon wires, as well as the measurement of growth rates of individual nanowires and the ability to observe the formation of nanowire bridges between separate cantilevers to form a complete nanowire device. How well the nanowires can be nucleated controllably on typical cantilever sidewalls is examined, and the measurements of nanowire growth rates are used to calibrate the cantilever-heater parameters used in finite-element models of cantilever heating profiles, useful for optimization of the design of devices requiring local growth.

Customizable in situ TEM devices fabricated in freestanding membranes by focused ion beam milling

Nano- and microelectromechanical structures for in situ operation in a transmission electron microscope (TEM) were fabricated with a turnaround time of 20 min and a resolution better than 100 nm. The structures are defined by focused ion beam (FIB) milling in 135 nm thin membranes of single crystalline silicon extending over the edge of a pre-fabricated silicon microchip. Four-terminal resistance measurements of FIB-defined nanowires showed at least two orders of magnitude increase in resistivity compared to bulk. We show that the initial high resistance is due to amorphization of silicon, and that current annealing recrystallizes the structure, causing the electrical properties to partly recover to the pristine bulk resistivity. In situ imaging of the annealing process revealed both continuous and abrupt changes in the crystal structure, accompanied by instant changes of the electrical conductivity. The membrane structures provide a simple way to design electron-transparent nanodevices with high local temperature gradients within the field of view of the TEM, allowing detailed studies of surface diffusion processes. We show two examples of heat-induced coarsening of gold on a narrow freestanding bridge, where local temperature gradients are controlled via the electrical current paths. The separation of device processing into a one-time batch-level fabrication of identical, generic membrane templates, and subsequent device-specific customization by FIB milling, provides unparalleled freedom in device layout combined with very short effective fabrication time. This approach significantly speeds up prototyping of nanodevices such as resonators, actuators, sensors and scanning probes with state-of-art resolution.

Integration, gap formation, and sharpening of III-V heterostructure nanowires by selective etching

Epitaxial growth of heterostructure nanowires allows for the definition of narrow sections with specific semiconductor composition. The authors demonstrate how postgrowth engineering of III-V heterostructure nanowires using selective etching can form gaps, sharpening of tips, and thin sections simultaneously on multiple nanowires. They investigate the potential of combining nanostencil deposition of catalyst, epitaxial III-V heterostructure nanowire growth, and selective etching, as a road toward wafer scale integration and engineering of nanowires with existing silicon technology. Nanostencil lithography is used for deposition of catalyst particles on trench sidewalls and the lateral growth of III-V nanowires is achieved from such catalysts. The selectivity of a bromine-based etch on gallium arsenide segments in gallium phosphide nanowires is examined, using a hydrochloride etch to remove the III-V native oxides. Depending on the etching conditions, a variety of gap topologies and tiplike structures are observed, offering postgrowth engineering of material composition and morphology.

Semiconducting III-V nanowires with nanogaps for molecular junctions: DFT transport simulations.

We consider here the possibility of using III-V heterostructure nanowires as electrodes for molecular electronics instead of metal point contacts. Using ab initio electronic structure and transport calculations, we study the effect on electronic properties of placing a small molecule with thiol linking groups, benzene-di-thiol (BDT), within a nanosize gap in a III-V nanowire. Furthermore, it is investigated how surface states affect the transport through pristine III-V nanowires and through the BDT molecule situated within the nanogap. Using GaAs and GaP as III-V materials we find that the BDT molecule provides transport through the entire system comparable to the case of gold electrodes.