Christoph Hagleitner

Probe-based ultrahigh-density storage technology

Ultrahigh storage densities can be achieved by using a thermomechanical scanning-probe-based data-storage approach to write, read back, and erase data in very thin polymer films. High data rates are achieved by parallel operation of large two-dimensional arrays of cantilevers that can be batch fabricated by silicon-surface micromachining techniques. The very high precision required to navigate the storage medium relative to the array of probes is achieved by microelectromechanical system (MEMS)- based x and y actuators. The ultrahigh storage densities offered by probe-storage devices pose a significant challenge in terms of both control design for nanoscale positioning and read-channel design for reliable signal detection. Moreover, the high parallelism necessitates new dataflow architectures to ensure high performance and reliability of the system. In this paper, we present a small-scale prototype system of a storage device that we built based on scanning-probe technology. Experimental results of multiple sectors, recorded using multiple levers at 840 Gb/in2 and read back without errors, demonstrate the functionality of the prototype system. This is the first time a scanning-probe recording technology has reached this level of technical maturity, demonstrating the joint operation of all building blocks of a storage device.

CMOS resonant beam gas sensing system with on-chip self excitation

We present a single-chip CMOS resonant beam gas sensing system with on-chip self excitation for the detection of volatile organic compounds (VOC). For the first time, a mass-sensitive resonant cantilever is cointegrated with a feedback circuit yielding a sensor system operating in a self-excitation mode. Analyte gases are absorbed by a sensitive layer deposited on the cantilever. The corresponding mass increase leads to a decrease of the beams resonance frequency. In this way, concentrations of various VOCs in synthetic air are measured. The influence of polymer thickness on resonance frequency, quality factor, and vibration amplitude is investigated. The frequency stability and sensitivity of the cantilever sensor is tested and an optimal polymer thickness of 3-4 pm determined. A limit of detection of 0.8 ppm for octane is calculated. This corresponds to a mass resolution of less than 0.4 pg. The on-chip integration of the feedback circuit makes it possible to abandon external driving circuitry. Thus, it drastically reduces the system size and number of components, and facilitates mass production.

Device, circuit and system-level analysis of noise in multi-bit phase-change memory

We present a comprehensive investigation of noise in multi-bit phase-change memory (PCM). The impact of noise on data integrity was quantified with a combination of experiments and simulations. A prototype chip was fabricated to support our system-level analysis, which shows that a raw bit error rate of ∼10−4 is achievable at 3-bit/cell. At the circuit level, we identified the bit line capacitance and the voltage regulator noise as the critical elements determining the electronic readout circuit noise. In addition, device-level measurements showed that 80% of the total noise can be traced back to the fluctuations in the PCM cell current itself. Our analysis captures for the first time how these fluctuations ultimately limit the achievable bit error rate in future multi-level-cell (MLC) PCM chips.

Designing a Programmable Wire-Speed Regular-Expression Matching Accelerator

A growing number of applications rely on fast pattern matching to scan data in real-time for security and analytics purposes. The RegX accelerator in the IBM Power Edge of Network (PowerEN) processor supports these applications using a combination of fast programmable state machines and simple processing units to scan data streams against thousands of regular-expression patterns at state-of-the-art Ethernet link speeds. RegX employs a special rule cache and includes several new micro-architectural features that enable various instruction dispatch and execution options for the processing units. The architecture applies RISC philosophy to special-purpose computing: hardware provides fast, simple primitives, typically performed in a single cycle, which are exploited by an intelligent compiler and system software for high performance. This approach provides the flexibility required to achieve good performance across a wide range of workloads. As implemented in the PowerEN processor, the accelerator achieves a theoretical peak scan rate of 73.6 Gbit/s, and a measured scan rate of about 15 to 40 Gbit/s for typical intrusion detection workloads.

Curved in-plane electromechanical relay for low power logic applications

A curved design for in-plane micro- and nano-electromechanical switches based on a single clamped cantilever is proposed, optimized with finite-element simulations and demonstrated experimentally. The design enables precise control of the switch motion and of the closed-state air gap, resulting in a uniform electrostatic field and increased robustness. The switch size and curvature are optimized for actuation voltage, actuation energy and the electrostatic field strength. These optimizations and the proposed fabrication process are amenable to micro- and nano-electromechanical switches. The scalability of the concept is demonstrated with simulations of nanoscale relays in terms of force and energy, showing that the concept is suitable for sub-100 aJ switching energy. Experimental results on microscale devices demonstrate the advantages of the curved MEM switches, namely a fabrication process with a single sacrificial layer for a switch with a low actuation voltage and excellent robustness. The designed as well as the experimentally observed breakdown voltage is four times higher than the contact voltage, thus enabling a large operating window for electromechanical switches. (Some figures may appear in colour only in the online journal)

CMOS monolithic microelectrode array for stimulation and recording of natural neural networks

An array of platinum electrodes has been integrated with analog and digital circuitry in standard CMOS technology for stimulation and recording of natural neural networks. The array utilizes a shifted electrode design that has been electrically characterized and modeled. The electrode and its circuitry form a repeatable unit, which can be multiplied to achieve a larger array. Each circuitry unit contains a buffer for stimulation and a bandpass filter for readout. In contrast to traditional electrode arrays used for measuring action potentials, this device is capable of on-chip signal filtering, improving the signal to noise ratio (SNR), on-chip analog to digital conversation (preventing further signal degradation), and simultaneous recording and stimulation.

Memory-efficient distribution of regular expressions for fast deep packet inspection

Current trends in network security force network intrusion detection systems (NIDS) to scan network traffic at wirespeed beyond 10 Gbps against increasingly complex patterns, often specified using regular expressions. As a result, dedicated regular-expression accelerators have recently received considerable attention. The storage efficiency of the compiled patterns is a key factor in the overall performance and critically depends on the distribution of the patterns to a limited number of parallel pattern-matching engines. In this work, we first present a formal definition and complexity analysis of the pattern distribution problem and then introduce optimal and heuristic methods to solve it. Our experiments with five sets of regular expressions from both public and proprietary NIDS result in an up to 8.8x better storage efficiency than the state of the art. The average improvement is 2.3x.

A single-chip CMOS micro-hotplate array for hazardous-gas detection and material characterization

A single-chip microsystem for the detection and discrimination of hazardous gases and solid-state material characterization is presented. The circuit features three micro-hotplates, and each requires mixed-signal circuitry. The microsystem is fabricated in industrial 0.8/spl mu/m CMOS technology with post-CMOS micromachining. The power efficiency of the micro-hotplate is 10/spl deg/C/mW and represents a 60% improvement.

Very high Q-factor in water achieved by monolithic, resonant cantilever sensor with fully integrated feedback

We present a novel, monolithic, mass-sensitive cantilever sensor for measurements in liquids, which achieves a high quality factor (Q-factor) by closed-loop actuation. The cantilever is the frequency-determining element in the feedback system, its resonance frequency being a function of the mass-change on the surface. While cantilever-based sensors generally suffer from low quality factors in liquids due to the strong damping, our device uses an internal feedback loop circuitry to enhance the Q-factor. This allows to increase Q-factor from 23 to 19,000 at a resonance frequency of 221 kHz. The cantilever is electromagnetically actuated by Lorentz force while the oscillation is detected by piezoresistive MOS-transistors. A fully differential feedback circuitry with amplitude control is integrated together with the cantilever on the same chip. Thanks to the high Q-factor and the resulting frequency stability, even small frequency (and mass) changes can be precisely measured by this fully integrated system. Therefore, active, external actuation or readout instrumentation, such as a laser for optical detection, is not required. The sensor is an excellent candidate for biosensing applications in liquids such as biomolecule hybridization and illustrates the advantage of integrated circuitry for resonant sensors.

Modeling, Design, and Verification for the Analog Front-End of a MEMS-Based Parallel Scanning-Probe Storage Device

We present an integrated analog front-end (AFE) for the read-channel of a parallel scanning-probe storage device. The read/write element is based on an array of microfabricated silicon cantilevers equipped with heating elements to form nanometer-sized indentations in a polymer surface using integral atomic-force microscope (AFM) tips. An accurate cantilever model based on the combination of a thermal/electrical lumped-element model and a behavioral model of the electrostatic/mechanical part are introduced. The behavioral model of the electrostatic/mechanical part is automatically generated from a full finite-element model (FEM). The model is completely implemented in Verilog-A and was used to co-develop the integrated analog front-end circuitry together with the read/write cantilever. The cantilever model and the analog front-end were simulated together and the results were experimentally verified. The approach chosen is well suited for system-level simulation and verification/extraction in a design environment based on standard EDA tools.