Christopher Temple

A Prototype Implementation of a TTP/C Controller

The SAE has classi ed automotive electronics into two major categories body electronics and system elec tronics The latter SAE class C comprises safety crit ical functions that are of vital importance for the move ment of the vehicle This paper presents a prototype implementation of TTP a time triggered communica tion system developed for this type of applications The main purpose of the prototype is to provide a means for verifying the concepts of TTP The paper focuses on a description of the hardware developed for the communication system as well as the protocol software The TTP controller hardware is a custom made industry pack module which allows the use of TTP in conjunction with a wide variety of exist ing motherboards and host environments The protocol software consists of a TTP C protocol state machine and auxiliary modules to access the various hardware units

Integrating WCET Analysis into a Matlab/Simulink Simulation Model 1 2 3

Abstract Traditional worst-case execution time (WCET) analysis interfaces to the user either through high-level language source code or assembly/machine code. This paper demonstrates how WCET analysis can be integrated into high-level application design and simulation tools like Matlab/Simulink, thus providing a higher-level interface to WCET analysis. The paper shows necessary restrictions and adaptions to Matlab/Simulink that make code generated from the tool chain amenable to WCET analysis. It presents the interface between the Matlab/Simulink block set and WCET analysis and explains the steps performed during WCET analysis.

Mode handling in the Time-Triggered Architecture

Abstract Large real-time applications often impose stringent requirements on the system architecture concerning the number of different operating conditions under which they must operate. Modes and mode changes are a powerful concept to represent these operational phases within the system architecture. This paper focuses on the modes and the mode change strategy available in the time-triggered architecture. The time-triggered architecture is outlined and the principle of modes and mode changes is introduced. The modes introduced in the TTA meet the requirements imposed by different operating conditions of hard real-time systems. The requirements for mode changes are identified and the conflict between consistency and speed is resolved by introducing two distinct types of mode changes.

Economic online self-test in the time-triggered architecture

Traditional online self-testing methods in event-triggered systems compromise system responsiveness or result in costly solutions. The testing strategy presented here takes advantage of the properties offered by a time-triggered system to avoid interfering with system responsiveness while maintaining low test overhead.

Mode Handling in the Time-Triggered Architecture

Abstract Large real-time applications often impose stringent requirements on the system architecture concerning the number of different operating conditions under which they must operate. Modes and mode changes are a powerful concept to represent these operational phases within the system architecture. This paper focuses on the modes and the mode change strategy available in the time-triggered architecture. The time-triggered architecture is outlined and the principle of modes and mode changes is introduced. The modes introduced in the TTA meet the requirements imposed by different operating conditions of hard real-time systems. The requirements for mode changes are identified and the conflict between consistency and speed is resolved by introducing two distinct types of mode changes.