Chu-Hsuan Sha

Silver Microstructure Control for Fluxless Bonding Success Using Ag-In System

A fluxless bonding process is successfully developed between silicon (Si) chips and copper (Cu) substrates using the silver-indium (Ag-In) binary system. This is a new design concept that utilizes thick Ag plated over the Cu substrate to deal with the large mismatch in coefficient of thermal expansion between semiconductors, such as Si (3 ppm/°C) and Cu (17 ppm/°C). The Ag layer actually becomes a part of the Ag-Cu substrate. Ag is chosen for the cladding because of its superior physical properties of ductility, high electrical conductivity, and high thermal conductivity. Following the thick Ag layer, 5 μm In and 0.1 μm Ag layers are plated. The thin outer Ag layer inhibits oxidation of inner In. After many bonding experiments, we realize that the success of producing a joint relates to the microstructure of the Ag layer. Ag with small grains results in rapid growth of solid Ag2In intermetallic compounds through grain boundary diffusion. Thus, a joint is not obtained because of lack of molten phase (L). To coarsen Ag grains, an annealing step is added to the Ag-plated Cu substrate. This step makes Ag grains 200 times coarser compared to the as-plated Ag. The coarsened microstructure slows down the Ag2In growth. Consequently, the (L) phase stays at the molten state with sufficient time to react with the Ag layer on the Si chip to produce a joint. Nearly perfect joints are produced on Ag-plated Cu substrates. The resulting joints consist of pure Ag, Ag-rich solid solution, Ag2In, and Ag3In. The melting temperature exceeds 650 °C. Using the present process, high temperature joints of high thermal conductivity are made between Si chips and Cu substrates at low bonding temperature (200°C). We foresee the Ag-In system as an important system to explore for various fluxless bonding applications in electronic packaging. This system provides the possibilities of producing joints of wide composition choices and wide melting temperature range. This paper provides preliminary but useful information on how the microstructure of Ag affects the bonding results.

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A flip-chip interconnect process at 180^°C using the silver-indium (Ag-In) binary system is reported. An array of 50 × 50 flip-chip joints with 100 μm pitch and 40 μm joint diameter was fabricated. Each joint has the column structure of Ag/(Ag)/Ag₂In/(Ag) that connects the silicon (Si) chip to the copper (Cu) substrate. The joint height is approximately 50 μm. In this structure, Ag₂In is a dominating intermetallic compound in the Ag-In system with melting temperature of 660^°C. (Ag) is a solid solution phase of Ag with In composition up to 20 at.%. It has a solidus temperature range of 695 to 962^°C depending on In composition. In long-term operation, (Ag)/Ag₂In/(Ag) is expected to gradually convert to a single (Ag) phase, which is more reliable. Thus, the flip-chip joints will get better in use. In fabrication, 50 × 50 Ag columns were made on Si wafer coated with chromium (Cr) and gold (Au). The Cu substrate was electroplated with Ag(10 μm)/In(5 μm)/Ag(thin). Si chips with Ag columns were bonded to Cu substrates at 180^°C for 5 min. No flux was used. Cross-sectional scanning electron microscopy images show that all 50 Ag columns in one row are well bonded to the Cu substrate without visible voids or cracks. Energy-dispersive X-ray spectroscopy data indicate that the resulting column structure is Ag/(Ag)/Ag₂In/(Ag). The process temperature of this new interconnect method is 80 ^°C below the typical reflow temperature of tin-based lead-free solders.

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Pure silver (Ag) is used as a bonding medium to bond silicon (Si) chips to alumina substrates. The bonding process is performed at 260°C, which is a typical peak reflow temperature of Sn3.5Ag solders used in electronic industries. A static pressure of 1000 psi (6.9 MPa) is applied. This is a solid-state bonding process without any molten phase involved. The Ag foil sandwiched between the Si chip and the alumina substrate is ductile enough to deform and mate with the gold (Au) layers coated, respectively, on the Si chip and on the alumina substrate. Ag and Au atoms on both sides of the bonding interfaces are brought within atomic distance, and bonding is thus achieved. The ductile Ag joints can accommodate significant mismatch in coefficient of thermal expansion between Si and alumina. Scanning electron microscopy evaluations show that nearly perfect joints are achieved and no voids are observed. A standard shear test is performed to assess the bonding strength. The shear strength measured far exceeds the requirement specified in MIL-STD-883G standard.

Flip-Chip Process Using Ag–In Transient Liquid Phase Reaction

).Scanning electron microscope (SEM) images exhibit quite clear rocky-wall-like structure.Grain boundaries are clearly observed. Each grain contains many subgrains and the av-erage grain size is 10 lm. Energy dispersive X-ray analysis determines the compositionas 69 wt. % iron (Fe), 19 wt. % chromium (Cr), 10 wt. % nickel (Ni), around 2 wt. %manganese (Mn), and less than 0.08 wt. % carbon (C), which agrees well with the dataprovided by the manufacturer. Diffraction peaks produced by X-ray diffraction (XRD)are able to correspond to profiles found in XRD database, showing that 304SS has face-centered cubic crystal lattice. The Ni strike technique is used as surface treatment tomake 304SS bondable to other metals, such as silver (Ag), copper (Cu), and gold (Au),commonly used in electronic packaging. Cross section SEM images show that thick Ag,Cu, up to 50 lm, and Au, up to 70 lm, were successfully plated over the thin Ni layerthat was plated on 304SS. [DOI: 10.1115/1.4003990]Keywords: stainless steel, microstructure, surface treatment, electronic packaging

Low-Temperature Solid-State Silver Bonding of Silicon Chips to Alumina Substrates

Summary In this study, 6 mm 6 mm Ag foils were bonded directly onalumina substrates which were precoated with TiW and Au with-out any bonding medium such as solder. This is made possible bysolid state bonding theory where Ag atoms and Au atoms arebrought within atomic distance so that they can share electrons.The close proximity of Ag and Au is achieved by deformationwith static pressure. Since Ag and Au are ductile, only 1000 psiand 260 C are required. SEM images show that the Ag foil iswell bonded to the Au layer on alumina. Five bonded sampleswent through shear test. The shear strength measured far exceedsthe strength requirement specified in MIL-STD-883G standard.This bonding technology can serve as an alternative to DBC orDBA technology on applications where Ag is preferred over Cudue to its ductility to manage CTE mismatch and Ag is preferredover Al owing to its higher thermal conductivity. References [1] Yoshino, Y., 1989, “Role of Oxygen in Bonding Copper to Alumina,” J. Am.Ceram. Soc., 72(8), pp. 1322–1327.[2] Dupont, L., Khatir, Z., Lefebvre, S., and Bontemps, S., 2006, “Effects of Metal-lization Thickness of Ceramic Substrates on the Reliability of Power Assem-blies Under High Temperature Cycling,” Microelectron. Reliab., 46(9–11), pp.1766–1771.[3] Yoshino, Y., Ohtsu, H., and Shibata, T., 1992, “Thermally Induced Failure ofCopper-Bonded Alumina Substrates for Electronic Packaging,” J. Am. Ceram.Soc., 75(12), pp. 3353–3357.[4] Schulz-Harder, J., 2001, “HPS DBC Substrates for High ReliableApplications,” Proceedings of IMAPS Nordic, Oslo, Norway.[5] Schulz-Harder, J., 1997, “Reliability of Direct Copper Bonded (DBC) Sub-strates,” Proceedings of ISHM 11th European Microelectronic Conference,Venice, Italy.[6] Schulz-Harder, J., 2003, “Advantages and New Development of Direct BondedCopper Substrates,” Microelectron. Reliab., 43(3), pp. 359–365.[7] Cusano, D. A., Loughran, J. A., and Sun, S. E., 1976, “Direct Bonding of Met-als to Ceramics and Metals,” U.S. Patent No. 3,994,430.[8] Dalgleish, B. J., Trumble, K. P., and Evans, A. G., 1989, “The Strength andFracture of Alumina Bonded With Aluminum Alloys,” Acta Metallic., 37(7),pp. 1923–1931.[9] Ning, X. S., Lin, Y., Xu, W., Peng, R., Zhou, H., and Chen, K., 2003,“Development of a Directly Bonded Aluminum=Alumina Power ElectronicSubstrate,” Mater. Sci. Eng. B, 99(1–3), pp. 479–482.[10] Knoll, H., Weidenauer, W., Ingram, P., Bennemann, S., Brand, S., and Petzold,M., 2010, “Ceramic Substrates With Aluminum Metallization for PowerApplication,” Proceedings of IEEE Electronic System-Integration TechnologyConference, Berlin, Germany, pp. 1–5.[11] Lei, T. G., Calata, J. N., Ngo, K. D. T., and Lu, G. Q., 2009, “Effects of LargeTemperature Cycling Range on Direct Bond Aluminum Substrate,” IEEETrans. Device Mater. Reliab., 9(4), pp. 563–568.[12] Lee, C. C., Wang, D. T., and Choi, W. S., 2006, “Design and Construction of aCompact Vacuum Furnace for Scientific Research,” Rev. Sci. Instrum., 77(12),p. 125104.[13] Wang, P. J., Kim, J. S., and Lee, C. C., 2008, “Direct Laminating SilverFoils on Copper Substrate,” J. Mater. Sci.: Mater. Electron., 19(11), pp.1097–1099.[14] Available online: http://www.q-tech.com/assets/tests/std883_2019.pdf

Microstructure and Surface Treatment of 304 Stainless Steel for Electronic Packaging

In this paper, aluminum circuit boards (ACBs) were designed, fabricated, and tested to demonstrate the possibility and advantages of the ACB technology. Processes were developed to grow high quality alumina (Al2O3) on Al boards and coat thick copper (Cu) layer over the alumina to produce an Al/alumina/Cu structure. The measured resistance and breakdown voltage of the as-formed 50 μm alumina layer is > 40 MΩ and 600 VDC respectively. In this design, heat generated by a high power circuit component attached to the Cu layer can conduct through the alumina layer and reach the Al base. Alumina has much higher thermal conductivity than epoxy-glass insulating layer of the popular FR-4 printed circuit boards. The quality of the boards produced in this paper was evaluated rigorously using scanning electron microscope. To test the reliability of the boards, they were put through 500 cycles of thermal cycling test between -40°C to +85°C and 100 h of high temperature storage test at 250 °C. To ensure its compatibility with soldering operations, 10 mm × 12 mm Cu substrates were bonded to the Al boards using a fluxless tin process. The thickness of the joint is 9.4 μm including the intermetallic layers. Despite significant coefficient of thermal expansion mismatch of the structure and large Cu size, the bonded samples show no sign of cracks, breakage, or degradation.

Solid State Bonding of Silver Foils to Metalized Alumina Substrates at 260°C

The high thermal conductivity and light weight properties of aluminum (Al) make it a promising material in high power device packaging and automotive design applications. A primary challenge is its high coefficient of thermal expansion (CTE) of 23 ppm/°C. In this research, we investigated the possibility of surmounting this challenge by bonding large Si chips to Al substrates using fluxless tin (Sn). Si versus Al pair probably has the largest CTE mismatch among all bonded structures in electronic packaging. In experiments, 0.1μm Cr layer and 0.2 μm Cu layer were deposited on Al substrates, followed by an electroplated thicker 25 μm copper (Cu) layer. The Sn solder layer was then electroplated over the Cu followed immediately by thin (0.1 μm) silver (Ag) layer. The bonding process is entirely fluxless. The joint thickness was controlled either by bonding pressure or by Cu spacers. Microstructure and composition of the joints were studied under scanning electron microscopy (SEM) and energy dispersive X-ray spectroscopy (EDX). Despite the large CTE mismatch, the bonded structures did not break. This preliminary result suggests potential adaption of Al substrates in electronic packaging where Al is avoided because of its high CTE.

Initial Success on Aluminum Circuit Board Technology

Flip-chip interconnect joints of copper/gold (Cu/Au) with 40-μm diameter and 100-μm pitch were made between silicon (Si) chips and Cu substrates using solid-state bonding at 200°C with a static pressure of 250-400 psi (1.7-2.7 MPa). The array of 50 × 50 Cu/Au columns was first created. In fabrication, photoresist with 50 x 50 cavities of 40-μm diameter and 45-μm depth were produced on Si wafers, which were first coated with 30 nm chromium and 100 nm Au films. Cu of 25-μm thickness was electroplated in the cavities, followed by 10 μm of Au. After stripping the photoresist, the array of 50 x 50 Cu/Au columns was obtained on a chip region of the wafer. The 50 x 50 Cu/Au columns on the chip were bonded to a Cu substrate by solidstate bonding. No molten phase was involved and no flux was used. No underfill was applied. The corresponding load for each column was only 0.22-0.35 g. Cross-section scanning electron microscopy images show that Cu/Au columns were well bonded to the Cu substrate. Despite the large mismatch in the coefficient of thermal expansion between Si and Cu, no joint breakage was observed. The pull test was performed and the fracture modes were evaluated. The fracture force and fracture strength obtained were 11.2-14.2 kg and 35-44 MPa (5000-6400 psi), respectively. The measured fracture force is four times larger than the criterion of the pull-off test in MIL-STD-883E.

Fluxless tin bonding of silicon chips to aluminum substrates

In this study, silicon (Si) chips were bonded to 304 stainless steel (SS) substrates using silver-indium (Ag-In) binary system without any use of flux. 304SS substrates were also bonded to 304SS substrates to develop low temperature fluxless processes to bond and seal two 304SS parts together. In the bonding design, Ag and In were deposited separately in layered structure. Various processes and solutions were experimented to plate Ag on 304SS. We have not found the process that could plate Ag directly on 304SS without an intermediate layer. So far, the most successful intermediate layer is nickel (Ni). Thus, Ni was plated on 304 SS, followed by Ag. The resulting 304SS substrates were annealed to increase Ag grain size if grain growth is needed for successful bonding. Nearly perfect joints were produced on Si to 304SS bonding and 304SS to 304SS bonding. The resulting joints are composed of Ag, Ag-rich solid solution (Ag), Ag3In, and Ag2In. The joints were fabricated at only 190°C of bonding temperature. The melting temperature of the joints exceeds 650°C. This new bonding process should be valuable for packaging electron devices that need high operating temperature. It is also useful for bonding 340SS parts together at low temperature.

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We performed 40μm silver (Ag)/gold (Au) composite flip-chip interconnects joints between silicon (Si) chips and copper (Cu) substrate using solid-state bonding process at 200°C. 50×50 Ag/Au columns with 40μm in diameter and 100μm pitch were fabricated on a chip region by photolithographic and electroplating processes. Then, the Ag/Au columns were bonding to Cu substrate with fresh surface using solid-state at 200°C for five minutes with a static pressure of 1.7~2.7 MPa (250~400psi). The corresponding load for each column is 0.22~0.35 gm. The five minutes is constrained by the equipment. In theory, bonding should occur in seconds. Cross section SEM images show that Ag/Au column is well bonded to Cu substrate with no void or breakage within it. Ag/Au composite joints well manage the shear strain induced by coefficient of thermal expansion (CTE) mismatch. There is no molten phase during the bonding process. Neither flux nor underfill was used. Compared to solder flip-chip joints, this new process has the reduction of electrical resistance of the joints of the same size by a factor of 6. Pull test was conducted. The fracture force and fracture strength are 6.5~7.3kg and 2,940~3,310psi (20.2~22.8MPa), respectively. The fracture force is 2.5× of the criterion in MIL-STD-883E. The SEM/EDX analysis of the fracture interface showed that fracture of bonding interface is least likely to incur in pull test.