Chuan-Yue Yang

An Approximation Algorithm for Energy-Efficient Scheduling on A Chip Multiprocessor

In the recent decade, voltage scaling has become an attractive feature for many system component designs. In this paper we consider energy-efficient real-time task scheduling over a chip multiprocessor architecture. The objective is to schedule a set of frame-based tasks with the minimum energy consumption, where all tasks are ready at time 0 and share a common deadline. We show that such a minimization problem is NP-hard and then propose a 2.371-approximation algorithm. The strength of the proposed algorithm was demonstrated by a series of simulations, for which near optimal results were obtained.

An approximation scheme for energy-efficient scheduling of real-time tasks in heterogeneous multiprocessor systems

As application complexity increases, modern embedded systems have adopted heterogeneous processing elements to enhance the computing capability or to reduce the power consumption. The heterogeneity has introduced challenges for energy efficiency in hardware and software implementations. This paper studies how to partition real-time tasks on a platform with heterogeneous processing elements (processors) so that the energy consumption can be minimized. The power consumption models considered in this paper are very general by assuming that the energy consumption with higher workload is larger than that with lower workload, which is true for many systems. We propose an approximation scheme to derive near-optimal solutions for different hardware configurations in energy/power consumption. When the number of processors is a constant, the scheme is a fully polynomialtime approximation scheme (FPTAS) to derive a solution with energy consumption very close to the optimal energy consumption in polynomial-time/space complexity. Experimental results reveal that the proposed scheme is very effective in energy efficiency with comparison to the state-of-the-art algorithm.

Energy-efficient real-time task scheduling with temperature-dependent leakage

Leakage power consumption contributes significantly to the overall power dissipation for systems that are manufactured in advanced deep sub-micron technology. Different from many previous results, this paper explores leakageaware energy-efficient scheduling if leakage power consumption depends on temperature. We propose a pattern-based approach which divides a given time horizon into several time segments with the same length, where the processor is in the active (dormant, respectively) mode for a fixed amount of time at the beginning (end, respectively) of each time segment. Computation is advanced in the active mode, whereas the dormant mode helps reduce the temperature via cooling as well as the leakage power consumption. Since the pattern-based approach leads to a steady state with an equilibrium temperature, we develop a procedure to find the optimal pattern whose energy consumption in steady state is the minimum. Compared to existing work, our approach is more effective, has less run-time scheduling overhead, and requires only a simple scheduler to control the system mode periodically. The paper contains extensive simulation results which validate the new models and methods.

Slack reclamation for real-time task scheduling over dynamic voltage scaling multiprocessors

In the past decades, a number of research results have been reported for energy-efficient task scheduling over uniprocessor and multiprocessor environments. While researchers have started the exploring of slack reclaiming for tasks during run time, little work has been done for multiprocessor cases. This paper proposes a set of multiprocessor energy-efficient task scheduling algorithms with different task remapping and slack reclaiming schemes, where tasks have the same arrival time and share a common deadline. Tasks are reassigned to processors dynamically, and the slack time is reclaimed to slow down the execution speeds of the remaining tasks for energy efficiency. Extensive simulations were performed to provide insights. The energy consumption could be reduced up to 29% in the experiments, compared to the previous work

Real-Time Task Replication for Fault Tolerance in Identical Multiprocessor Systems

Multiprocessor platforms have been widely adopted in both embedded and server systems. In addition to the performance improvement, multiprocessor systems could have the flexibility in tolerating processor failures via task replication. This paper considers the replication of periodic hard real-time tasks in identical multiprocessor environments. Each task is replicated on K distinct processors, where K is a user-determined integer for fault tolerance to improve system reliability. When the objective is to minimize the maximum utilization in a system with a specified number of processors, we present a greedy algorithm with a 2-approximation ratio, and a polynomial-time approximation scheme is developed. For the minimization of the number of processors required to derive feasible schedules with task replication, we develop greedy algorithms with a 2-approximation ratio and an asymptotic polynomial-time approximation scheme

Approximation Algorithms for Multiprocessor Energy-Efficient Scheduling of Periodic Real-Time Tasks with Uncertain Task Execution Time

Energy-efficiency has been an important system issue in hardware and software designs for both real-time embedded systems and server systems. This research explores systems with probabilistic distribution on the execution time of realtime tasks on homogeneous multiprocessor platforms with the capability of dynamic voltage scaling (DVS). The objective is to derive a task partition which minimizes the expected energy consumption for completing all the given tasks in time. We give an efficient 1.13-approximation algorithm and a polynomial-time approximation scheme (PTAS) to provide worst-case guarantees for the strongly NP-hard problem. Experimental results show that the algorithms can effectively minimize the expected energy consumption.

Energy-efficient real-time scheduling of multimedia tasks on multi-core processors

In recent years, various multi-core architectures have become popular selections for the designs of mobile platforms. With the strong computing demands from many multimedia applications, how to energy-efficiently utilize the computing power of mobile platforms without violations of timing constraints has become a critical design problem. In this paper, a data-partitioning-based approach is proposed to explore the parallelism of multimedia workload processing over multiple cores. Dynamic voltage scaling and dynamic power management strategies are both considered in the dynamic scaling of the computing power of cores and the adjustment of the set of active cores, respectively. The practicability and the energy efficiency of the proposed algorithms were evaluated by a series of experiments and simulations, for which we have encouraging results.

Booting Time Minimization for Real-Time Embedded Systems with Non-Volatile Memory

Minimizing the booting time of an embedded system has become a major technical issue for the success of many consumer electronics. In this paper, the booting time minimization problem for real-time embedded systems with the joint consideration of DRAM and non-volatile memory is formally formulated. We show this is an NP-hard problem, and propose an optimal but pseudo-polynomial-time algorithm with dynamic programming techniques. In considering polynomial-time solutions, a 0.25-approximation greedy algorithm is provided, and a polynomial-time approximation scheme is developed to trade the optimality of the derived solution for the time complexity according to a user-specified error bound. The proposed algorithms can manage real-time embedded systems consisting of not only real-time tasks, but also initialization tasks that are executed only once during system booting. The proposed algorithms were then evaluated with 65 real benchmarks from the MRTC and DSPstone benchmark suites, and the results showed that all of the proposed algorithms can reduce booting time for each benchmark set by more than 29 percent. Moreover, extensive simulations were conducted to show the capability of the proposed approaches when used with various hardware resources and software workloads.

Energy-Efficient Task Synchronization for Real-Time Systems

In the past decade, energy-efficient real-time task scheduling has been widely explored in the form of various optimization problems. This paper considers energy-efficient real-time task synchronization protocols and the overhead of frequency switching in real systems design. We propose the concept of frequency locking to better manage the cost in frequency switching. To minimize the energy consumption and meet the timing constraints, algorithms are presented to assign tasks base frequencies under existing synchronization protocols which are then extended with the frequency locking concept. Finally, a series of extensive simulations is performed and a real case study is presented to evaluate the proposed methodology and obtain comparison studies using different workloads and protocols.

System-Level Energy-Efficiency for Real-Time Tasks

Dynamic voltage scaling (DVS) has been adopted in many computing systems to reduce the energy consumption of the processor by slowing down the processor speed. However, for system devices without DVS capability, the longer a task executes, the more energy the task consumes in the required system devices. This paper explores energy-efficient scheduling for periodic hard real-time tasks in a system consisted of a DVS processor and multiple non-DVS system devices. We propose an algorithm for static scheduling which minimizes the system energy consumption of a given set of real-time tasks, provided that each task executes in its worst case. For systems in which some tasks might complete earlier than its estimated worst-case execution time, we develop on-line algorithms to reclaim the slack time to reduce the energy consumption. Compared to existing algorithms, our proposed algorithm can reduce the energy consumption both in the CPU and system devices