Ciaran Feeney

A 20-MHz 1.8-W DC–DC Converter With Parallel Microinductors and Improved Light-Load Efficiency

The purpose of this paper is to show that distributing microinductors in parallel can reduce light-load losses, while also maintaining the same overall footprint area and the same effective inductance as a single microinductor. The performance of parallel microinductors is compared in a number of configurations to demonstrate which configuration provides the best overall performance in terms of circuit size, conversion efficiency, and power handling. Light-load saving techniques are implemented demonstrating the potential of parallel inductors to improve efficiency at light-load. Measured and modeled results of efficiency versus load are presented for the prototype DC-DC converters explored, and a peak efficiency of 74% is predicted for a 1.8 W, 20-MHz DC-DC converter including microinductors.

Loss Modeling of Coupled Stripline Microinductors in Power Supply on Chip Applications

In this paper, models that account for the duty cycle and phase shift angle of the applied phase voltages in coupled stripline microinductors are presented and are shown to have a significant impact on harmonic current amplitudes and therefore microinductor efficiency. The impact of a high coupling factor between two windings surrounded by a single core is also investigated. The models are validated using finite-element analysis and measurements. A three-phase-coupled microinductor has been fabricated with a Ni45Fe55 core and analyzed for a number of operating conditions. A prototype 1.6 W, three-phase converter utilizing this inductor has also been measured and is discussed in detail. The coupled microinductor is predicted to have a peak efficiency of 86.6% at 20 MHz in the prototype circuit.

AC Winding Loss of Phase-Shifted Coupled Windings

In circuits where there is an inherent phase shift angle between coupled winding currents such as in coupled inductors, it is important to accurately calculate the ac winding loss at the correct phase shift and frequency. Phase shift between winding currents can cause the ac winding loss to vary significantly due to changes in the magnetic field distribution. This paper presents an analysis of winding loss for the general case of coupled windings with arbitrary phase-shifted currents and its effect in a number of practical devices. A detailed approach to analytically calculate ac winding loss in microfabricated-coupled stripline inductors is presented along with a derivation of the resistance matrix for the device. The analysis and methodology are then validated using finite element analysis and experimental results.

Design Procedure for Racetrack Microinductors on Silicon in Multi-MHz DC–DC Converters

Inductor-on-silicon research to date has focused on optimizing technologies for maximum power density and efficiency, with most design procedures based on computationally intensive methods. In this paper, a simple and intuitive method for designing microinductors based on a given dc-dc converter specification, which includes accurate models for all loss components, is presented. A detailed examination of variations in designs to realise the same circuit performance is presented. Finally, finite element analysis simulations demonstrating the accuracy of the models are given, along with measured results.

Optimization of Coupled Stripline Microinductors in Power Supply on Chip Applications

Coupled inductors offer significant advantages over their uncoupled counterparts; however, with these advantages come a number of additional design caveats. The factors affecting the design and optimization of coupled stripline microinductors for PwrSoC applications are outlined, which include device area, the number of coupled phases, duty cycle, paralleling of coupled inductors, switching frequency, as well as thermal and saturation constraints. Results of this analysis are presented and discussed along with guidelines for the design of coupled stripline microinductors, which show that paralleling coupled inductors is the best route toward higher output current. Analytical models predict a peak inductor efficiency of 86.8% and 86.3% for fabricated 3 and 5-phase coupled stripline microinductors with an Ni45Fe55 core, respectively. Models are verified by measurements on prototype 3 and 5-phase converters with parallel coupled stripline microinductors over a range of operating conditions.

Analysis of coupled microinductors for power-supplyon-chip applications

Coupled microinductors fabricated on silicon offer improved voltage regulator performance and reduced power loss compared to equivalent uncoupled microinductors. An analysis of coupled microinductors variables is presented which illustrates the optimum number of phases in terms of efficiency and impact on other circuit components. Models for eddy core loss which accounts for phase angle variation are included and are used to investigate a number of coupled inductor configurations designed for operation in a 9 W multiphase DC-DC converter. Their performance is analysed and models are validated.

Comparison of light-load improvement techniques for low power buck converters

Recently a great deal of work has been done to improve the efficiency of DC-DC converters at light-load. This has been driven by the desire to increase battery life in portable devices and to reduce standby power consumption in mains powered devices. In general, power supplies are moving towards higher switching frequencies to reduce passive component size, resulting in higher switching and gate drive power loss. Several methods to reduce power loss at light-load including Pulse Frequency Modulation and Diode Emulation are investigated in this paper. These methods however result in higher inductor current ripple as the inductor is designed for operation when output current is at its maximum. Distributing inductors in parallel is shown to provide a means for increasing the effective inductance at light-load through reducing current ripple.

Investigation of coupled inductors in a phase interleaved boost Module-Integrated-Converter

The application of coupled vs. non-coupled inductors in a phase-interleaved PV boost module-integrated-(MIC) converter is investigated in terms of inductor size, output voltage ripple and circuit efficiency. Reduced circuit size is the main motivation in this case whereby inductors currently dominate MIC size. Interleaved inductors provide one step towards size reduction by enabling current ripple cancellation at the converter input and output, so that the size of capacitors is significantly reduced. Further reduction in inductor size is demonstrated through the application of coupled inductors, in which two-phase inductors share the same core, to provide the same effective inductance as two larger non-coupled phase inductors.

Advantages of paralleling inductors-on-silicon in high frequency power converters

In general power supplies are moving towards higher switching frequencies to reduce the size of passive components; the ultimate goal is to facilitate the integration of active and passive components on a single silicon chip providing a Power Supply on Chip (PSoC). The purpose of this work is to show that distributing inductors-on-silicon in parallel can increase the output current and reduce losses while also maintaining the same overall footprint area and the same effective inductance as a single micro-inductor. The performance of distributed micro-inductors is compared in a range of parallel micro-inductor configurations to show which configuration provides the best overall performance in terms of circuit size, conversion efficiency and power handling. For that purpose, detailed analysis of the performance of all power components (inductors and MOSFETs) is carried out.

Design procedure for inductors-on-silicon in power supply on chip applications

Currently there is a great interest in inductors-on-silicon for power-supply-on-chip applications (PwrSoC), with an ultimate goal of integrating passive and active components on a single silicon die to reduce power supply size. While power levels of individual circuits are low, there is an ever-increasing trend towards ubiquitous computing; with the result that power consumption of mobile computing accumulates to a significant load demand from the grid. Inductor-on-silicon research to date has focused on optimising technologies for maximum power density and efficiency, without considering particular inductor specifications. In this paper a method for designing inductors-on-silicon based on a given DC-DC converter specification is presented.