Cícero M. T. Cruz

A transformerless single phase on-line UPS with 110 V/220 V input output voltage

In this paper, it is proposed a new nonisolated UPS system configuration that allows the bypass circuit operation even if the input voltage is different from the output voltage. The UPS system is composed by an AC-DC/DC-DC three level boost rectifier/converter combined with a double half bridge inverter. This topology allows the reduction of some parameters that are commonly discussed in the nonisolated UPS systems such as size and cost, compared with others isolated UPS configurations for the same purpose. Also, the efficiency are improved due to reduced number of switches and batteries, as well as no low frequency isolation transformer is required to realize bypass operation because of the common neutral connection. Both stages of the proposed circuit operate in high frequency, using a passive nondissipative snubber circuit in the boost converter and IGBTs switches in the double half bridge inverter, with low conduction losses, low tail current and low switching losses. A simple and well-known control strategy is used. Principle of operation and experimental results for a 2.6 kVA laboratory prototype are presented to demonstrate UPS performance.

Boost based on three-state switching cell for UPS applications

This paper presents a novel boost topology based on three-state switching cells for uninterruptible power supplies (UPS) applications. The main features of this converter are: reduced conduction losses on the controlled switches, magnetic components operating with the double of switching frequency reducing weight and volume, reduced high-frequency current ripple, simple control strategy that can be implemented with well know integrated circuits and connection between input power supply and converter output enabling the use of UPS inverter and by-pass. A theoretical analysis and experimental results from a 3 kW lab model are presented.

High gain DC-DC boost converter with a coupling inductor

This paper presents a design, mathematical modeling, simulation results and laboratory implementation of a 300 W high gain dc-dc boost converter with a coupled inductor, to step up the 24 V of a battery bank to 311 Vdc, aiming to supply residential loads with dc voltage in an off-grid PV system. The converter can supply most of the residential ac loads which input stage is a single-phase rectifier. Laboratory tests with the 300 W converter supplying electronic lights, mobile charger and audio-video system ac showed the viability of the proposed idea.

A low cost flyback-based high power factor battery charger for UPS applications

This paper proposes a feasible low cost isolated battery charger converter, which is powered directly by the ac mains voltage, and with characteristics of high power factor for uninterruptible power systems (UPS) applications. The main advantage of this converter is due to the fact of its total independence of the UPS online power stage. Thus, if the batteries capacity of the system are changed (i.e., the output power of the battery charger), no such modification are required to the main power stage of the UPS, such as re-design of the input ac/dc power stage for an higher or lower output power capacity. This re-design commonly occurs in UPS topologies that the battery charger is directly fed by the dc-link bus voltage, such as common neutral connections UPS. Another advantage is that the energy supplied to charge the batteries is processed by only one power processing stage, increasing the system reliability. As disadvantage of such converter is the reasonable efficiency. Experimental results and relevant curves regarding the proposed converter operation are shown, confirming the viability of such circuit.

Comparative analisys of performance for single-phase AC-DC converters using FPGA for UPS applications

This paper presents a comparative analysis of performance for three single phase AC-DC converters for UPS applications. The analyzed converters are the conventional three-level converter, the five-level interleaved converter, and the T type five-level converter. Such converters are used as input stage of UPS and have as common characteristic: power factor correction, digital control using FPGA and connection between input power supply and converter output enabling the use of UPS inverter and bypass. All the converters have the same design parameters, and the project specifications. The control system used to perform the PFC is based on OCC technique implemented by FPGA. The analyzed topologies comparison parameters are: current semiconductors stresses, power factor, total harmonic distortion, magnetic volume and weight, efficiency and dynamics response.

Comparative evaluation of three single-phase NPC inverters

In this paper is presented a comparative evaluation in steady-state of three single-phase NPC multilevel inverters. The first is a five-level neutral point clamped (NPC) inverter based on multi-stage switching cell (MSSC); the second is also a five-level neutral point clamped (NPC) inverter based on interleaved cell (IC); and the third is a three-level neutral point clamped (NPC) inverter based on paralleled cell (PC). For this comparative purpose, the switching frequency is constant and the evaluated parameters are the volume of the heatsinks and the passive components, the total harmonic distortion (THD) of the output voltage, the power density and efficiency of each topology. Theoretical analyses, as well as simulation and experimental results obtained from 5kW prototype are presented.

Study of Passive Snubbers Applied to a Single-phase High Power Factor Rectifier

This paper presents a family of non-dissipative passive snubbers applied to a single-phase rectifier with unity input power factor. This single-phase rectifier presents reduced conduction losses because the current flows through two power semiconductors only, for any stage of operation. The family of lossless passive snubbers presented in this paper guarantees soft-commutation during the turn-on and the turn-off intervals of the switch within a large range of variation of the input current. The snubber circuit not only should slow the di/dt and dv/dt rates of the active switch, but also losslessly recover the energy stored in the zero-current inductor and in the zero-voltage capacitor, leading to reduced voltage stress across the switches and diodes. The association of the family of high performance snubber circuits here presented with the single-phase rectifier with reduced conduction losses results in a high efficiency rectifier, free from overvoltages across the power switches. To access the performance of the proposed family, simulation and experimental results for a single-phase rectifier 3000W laboratory prototype using one snubber of the family are also presented.

Unit power factor single-phase rectifier with reduced conduction loss using a non-dissipative passive snubber

This paper presents a single-phase rectifier with low conduction losses. To have a further reduction in the rectifier losses, a passive non- dissipative snubber is included in the rectifier. The snubber allows non-dissipative commutation at the switches within a large range of the input current. The snubber reduces the rate of the current grow during the switch turn on and also the rate of voltage grow during the switch turn off. The performance of the snubber circuit associated with the low conduction losses results in a rectifier with high efficiency. The design of a three KW rectifier is also presented and simulation results are shown to access the performance of the proposed rectifier.

Three-level boost rectifier with FPGA digital control

This paper presents a three-state switching cell singlephase three-level boost rectifier with Power Factor Correction (PFC) using FPGA digital control. Its main features are: reduced conduction losses, weight and volume; simple digital control strategy based on One-Cycle Control (OCC) technique using FPGA; connection between input and output enabling the use of inverter and bypass for UPS application. A theoretical analysis, simulation results and preliminaries experimental results from a 3kW lab model are presented. The FPGA used in this study is an ALTERA Cyclone II EP2C20F484C7.

Inversol Development of Uninterruptible Power Supply to be used in a Photovoltaic System

This paper presents an on-line UPS, with a power factor correction and sinusoidal output, that can be used in a stand alone photovoltaic system. The focus on development a new UPS is due in Brazil has many UPS manufacturer. The project consists on a high frequency Boost isolator with power factor correction control. There is a full-bridge inverter after the Boost to supply the energy to an AC load. In the battery mode the system work with high gain boost converter that increase the voltages from the battery pack up to the voltage to supply the inverter.