Cindy Zhang

Scalable nonlinear resistor model for GaAs MMIC

A scalable nonlinear resistor model is proposed, which is suitable for epitaxial layer resistor on GaAs substrate commonly used in GaAs MMIC. Analytical expressions describing the geometry dependences of the model parameters are provided. The proposed scalable model, implemented into a circuit simulator, accurately predicts the DC, S parameter, and power performance of the resistors with various geometries. Approaches for improving resistor linearity are also described based on the proposed model.

Electromagnetic only HEMT model for switch design

Electromagnetic (EM) only HEMT model has been proposed and realized with commercial available EM simulator. EM analysis has been applied, for the first time, to the intrinsic part of HEMT device. The small signal behaviors of HEMT can be accurately predicted based directly on the layout and process information. After introducing two EM HEMT models for HEMTs in both on and off states, entire switch circuit, as a whole, can be EM simulated. The prediction accuracy for switch performance can be remarkably improved by taking into account all of the distributed and coupling effects inside the circuit.

Gate Width Dependence of Noise Parameters and Scalable Noise Model for HEMTs

Explicit expressions describing the gate width dependences of HEMTs noise parameters have been obtained experimentally. The minimum noise figure and optimum source admittance are proportional to gate width, and noise resistance is inversely proportional to gate width. A scalable noise model is then developed, which accurately predicates noise parameters in a broad gate width range. The scalable noise model can be attached to any nonlinear signal model to predicate both noise and nonlinear signal responses.

Nonlinear Signal Model with Linear Noise Response for Low Noise Circuits Design

A novel approach for generating nonlinear signal model with accurate noise response is proposed and demonstrated, which is realized with a cascade of a linear noise and a nonlinear signal models. The noise model behaves as a 0 Ohm resistor with arbitrary noise response. The noise response is described by a correlation matrix calculated directly from measured noise data. The noise model can easily be attached to any signal model for achieving dynamically bias dependent noise response. This approach significantly simplifiers the noise model extraction procedure, and can be applied to any device technologies such as HBTs, HEMTs, and MOSFETs.

Scaleable two-current low-noise phemt model that predicts IP3

Correlation of IP3 in a pHEMT to the third derivative of Ids wrt Vgs, or Gm3 is addressed. A non-linear large-signal pHEMT model was developed based on the fitting RF Gm characteristics as well as IV/CV. Systematic extraction approach is described. In extraction, RF Gm fitting minimizes the errors between modelled and measured Gm3. Scale-ability in terms of DC, S-parameters and IP3 is demonstrated. For large-size devices, other factors, such as RF-Gds characteristics, are also important. The over-all model includes also physics-based self-heating and scaleable measurement-based noise equations that makes it the most comprehensive and most practical LN_FET model in industry.

Multi-technology simulation with mixed design environments

Typical circuit simulation flows within a design environment provided by electronic design automation (EDA) vendors only support a single foundry process technology node. But multi-chip modules (MCM) and 3D-IC designs are typically done with multiple foundry process nodes, which bring a challenge for the EDA industry on how to simulate multiple dies with different technology nodes to capture interaction effects among various dies. Although some EDA vendors have recently introduced a Multi-Technology Simulation (MTS) feature within their design tools, it is not easy for designers to use and also does not work in cross platform design environments. In this paper, we will present an internally developed MTS methodology and utility that can work with both Cadence and Keysight ADS simulation environments based on our Central Chip Repository methodology. The paper will also describe in detail the challenges of multi-technology simulation and how to address these challenges.

Progress on distributed resistance model for pHEMT

With increasing scale and complexity in pHEMT circuit and dimension shrinking in unit pHEMT devices, distributed effects are becoming more crucial than ever. During design of amplifiers, precise prediction of the resistances of a device is vital to simulation result due to the direct impact on impedance. This work reports a set of experiments utilizing different testing structures to reveal how a pHEMT devices layout affects its gate-to-source/drain resistances due to distribution of resistance along electrodes and the consequent current crowding. As an example, a distributed resistance model of source-side gate bar is quantitatively analyzed. It is shown that the prediction of the model coincides with the measurement data obtained from a variety of testing devices with different numbers of gate fingers.