Clark A. Hamilton

Josephson D/A converter with fundamental accuracy

A binary sequence of series arrays of shunted Josephson junctions is used to make a 14-b D/A converter. With 13 bias lines, any step number in the range -8192 to +8192 -1.2 V to +1.2 V can be selected in the time required to stabilize the bias current (a few microseconds). The circuit is a fast accurate dc reference, and it makes possible the digital synthesis of ac waveforms whose amplitudes derive directly from the internationally accepted definition of the volt. >

A PULSE-DRIVEN PROGRAMMABLE JOSEPHSON VOLTAGE STANDARD

A voltage standard based on a series array of pulse‐biased, nonhysteretic Josephson junctions is proposed. The output voltage can be rapidly and continuously programmed over a wide range by changing the pulse repetition frequency. Simulations relate the circuit margins to pulse height, width, and frequency. Experimental results on a prototype circuit confirm the expected behavior.

Stable 1 volt programmable voltage standard

Several fully functional programmable voltage standard chips, each having a total of 32 768 Nb–PdAu–Nb Josephson junctions, have been fabricated and tested. The chips are based on a new design that provides fast programmability (1 μs) between voltages and stable voltage operation from −1 to +1 V. A comparison of the new standard with a conventional Josephson voltage standard is in agreement to 0.5±1.1 parts in 109. We demonstrate the utility of this standard by measuring the linearity of a digital voltmeter.

Josephson Voltage Standards

This paper reviews the development and use of Josephson voltage standards over the last 30 years, including classical dc standards, programmable standards based on binary weighted arrays, pulse-driven delta–sigma standards for ac wave-form synthesis, and single-flux-quantum voltage multipliers.

Application of the Josephson effect to voltage metrology

The unique ability of a Josephson junction to control the flow of magnetic flux quanta leads to a perfect relationship between frequency and voltage. Over the last 30 years, metrology laboratories have used this effect to greatly improve the accuracy of dc voltage standards. More recent research is focused on combining the ideas of digital signal processing with quantum voltage pulses to achieve similar gains in ac voltage metrology. The integrated circuits that implement these ideas are the only complex superconducting electronic devices that have found wide commercial application.

Series-array Josephson voltage standards

Series arrays typically including 1500 Josephson junctions driven at 90 GHz have been used to generate quantized reference voltages in excess of 1 V. Such standards simplify the procedure and reduce the measurement uncertainities in the calibration of electrochemical cells.

Pulse-driven Josephson digital/analog converter [voltage standard]

The authors have designed and demonstrated a pulse-driven Josephson digital/analog converter. When used as a programmable voltage standard, this device can synthesize metrologically accurate ac waveforms as well as stable dc voltages. We show through simulations that Josephson quantization produces a nearly ideal quantization noise spectrum when a junction is driven with a typical waveform produced by a digital code generator. This technique has been demonstrated in preliminary experiments with arrays of 1000 junctions clocked at frequencies up to 6 Gb/s, where sine waves of a few millivolts in amplitude were synthesized at frequencies up to 1 MHz.

Multiple‐quantum interference superconducting analog‐to‐digital converter

Disclosed is an analog-to-digital converter using superconducting interferometers connected in parallel, each interferometer being identical. The coupling of the analog signal to each successive interferometer is increased in the ratio of 1:2:4:8:16:32:, etc. The application of a pulsed power supply to the parallel connected interferometer generates output voltages on the interferometers. The output voltages are a Gray Code representation of the analog signal.

Margins and yield in single flux quantum logic

Simulations are used to optimize the design of simple rapid single flux quantum (RSFQ) logic gates and to determine their margins. Optimizations based on maximizing the smallest (critical) margin result in critical margins in the range of 19-50%. A Monte Carlo approach is used to illustrate the relationship between margins and process yield. Based on single gate simulations, the results show that 1 sigma parameter spreads of less than about +or-5% will be required to make medium- or large-scale integrated RSFQ logic circuits. A single-bit full adder using five RSFQ gates and a local self-timing network are simulated with discrete components. The full adder used 2000-A/cm/sup 2/ junctions with a specific capacitance of 0.04 pF/ mu /sup 2/ and had a logic delay of 87 ps and a worst-case margin of +or-19%. A small margin reduction which is not present in the individual gate simulations results from loading.<<ETX>>

1 volt DC programmable Josephson voltage standard

NIST has developed a programmable Josephson voltage standard (JVS) that produces intrinsically stable voltages that are programmable from -1.1 V to +1.1 V. The rapid settling time (1 /spl mu/s), large operating current margins (2 to 4 mA), and inherent step stability of this new system make it superior to a conventional JVS for many dc measurements. This improved performance is made possible by a new integrated-circuit technology using intrinsically shunted superconductor-normal-superconductor (SNS) Josephson junctions. These junctions operate at lower excitation frequencies (10 to 20 GHz) than a conventional JVS and have 100 times greater noise immunity. The Josephson chip consists of a binary array sequence of 32 768 SNS Josephson junctions. The chip has been integrated into a completely automated system that is finding application in mechanical/electrical watt-balance experiments, evaluation of thermal voltage converters, electron-counting capacitance standards, and metrology triangle experiments.