Claus Schöllhorn

Attenuation mechanisms of aluminum millimeter-wave coplanar waveguides on silicon

The loss mechanisms of silicon coplanar waveguides (CPW) with aluminum metallization are investigated up to 40 GHz. Three main parts contribute to the attenuation of coplanar waveguides (CPWs): the frequency-dependent conductor losses of the metallization, frequency-independent substrate losses, and the specifically investigated bias-dependent interface losses caused by free charges at the Si-SiO/sub 2/ interface. The minimum losses found in 50-/spl Omega/ CPWs with 45-/spl mu/m signal line width were 0.19 db/mm at 10 GHz and 0.33 dB/mm at 40 GHz. High-purity silicon from a float zone (FZ) process was used as substrate. Substrates with lower purity from a Czochralski (CZ) process (resistivity 50-100 /spl Omega/cm) resulted in somewhat higher (0.2-0.3 dB/mm) losses for the same CPW geometry.

Integration of surface-micromachined polysilicon mirrors and a standard CMOS process

Abstract This paper describes the integration of surface micromachining with polysilicon and a standard CMOS process with aluminium gates. A demultiplexer circuit for addressing one micromachined mirror out of a line of eight mirrors is realized as an example. The mirrors are electrostatically deflectable with driving voltages of about 30 V. An adaptation of the applied p-well CMOS process with aluminium gates and the surface micromachining is necessary in order to enable both processes to be integrated. The technology used is described.

Integrated silicon Schottky mixer diodes with cutoff frequencies above 1 THz

In this paper, fully monolithic integrated Schottky diodes on a high-resistivity (HR) silicon substrate with cutoff frequencies above 1 THz are presented. As HR silicon substrate, a common float-zone substrate was used. The necessity of an optimized layer design will be discussed. As it will be shown, cutoff frequencies above 1 THz are possible even for large area diodes with an optimized layer design, which provides the so-called MOTT operation. The demands for the layer design to realize MOTT operation and the resulting advantages for the component will be discussed in detail. The used fabrication process, which combines two separate standard processes, is explained briefly. The results of the electrical measurements and the achieved cutoff frequency will be summarized. To demonstrate a monolithic integration, the presented Schottky diodes have been manufactured in a process wherein RF microelectromechanical systems switches have been successfully produced. As a key application, a subharmonic mixer, with a 24-GHz RF signal and a 12-GHz local-oscillator signal, will be discussed.

Characterization of self-assembled Ge islands on Si(100) by atomic force microscopy and transmission electron microscopy

Abstract We present an alternative starting point of the fabrication of nanostructures for electronic devices by using self-assembling structures. One way for the growth of self-assembling structures as quantum dot (QD) arrays is based on the formation of coherently strained Ge islands on Si and requires controlling of a defined island growth (Stranski–Krastanov). For this reason we carried out systematic quantitative investigations of the growth of Ge islands. Stacks of two layers of Ge islands with a Si spacer were grown on a Si buffer and characterized by atomic force microscopy (AFM) and transmission electron microscopy (TEM). In the first series the Ge layer thickness was varied at a constant growth temperature and in the second series the growth temperature was varied for a constant Ge layer thickness. Many of the results described in this paper confirm the expected growth behavior of Ge islands, i.e. the Stranski–Krastanov growth mode and the increasing island density with decreasing growth temperature. However, two new aspects of the island growth were found. Small Ge islands are already formed from 2.15 monolayers (ML) of Ge at high growth temperatures. At lower growth temperatures (≤645°C, 6.2 ML coverage), few large islands with defects and a high density of small coherent islands are observed simultaneously. TEM studies of cross-sectional and plan-view samples reveal that the small islands are elongated along (100) directions. Reasons for the formation of the two kinds of islands are discussed.

Coalescence of germanium islands on silicon

Abstract The growth of Ge islands on Si (Stranski–Krastanov growth mode) is well known (I.N. Stranski, L.v. Krastanov, Akad. Wiss. Wien, Math.-Naturw. Kl. Abtlg. IIb 146 (1937) 797). At larger Ge coverages the islands coalesce and form a quasi two-dimensional film. We investigated this transition from island growth to quasi two-dimensional films for a rather high Ge deposition rate of 0.25 nm/s. The germanium islands were grown by molecular beam epitaxy. At mean thicknesses of 1.25 and 3.75 nm the surface morphology of Ge depositions was observed by atomic force microscopy as a function of deposition temperature. At temperatures between 500 and 550°C, we confirm the 3D-island growth as expected from the Stranski–Krastanov growth mode. But below these temperatures the islands coalesce and form a continuous film (E. Kasper, H. Jorke, J. Vac. Sci. Technol. A 10(4) (1992) 1927). The waviness of the films decrease with decreasing temperatures resulting in smooth layers at 300°C growth temperature.

RF-Schottky diodes with Ni silicide for mixer applications

In this paper n- and p-doped Schottky diode with NiSi (nickel silicide) as contact material will be compared with Schottky diodes with Al (aluminum) contact. It is shown that a useable p-doped Schottky diode with high cut-off frequency could be achieved if nickel silicide is used as contact material. Also is proved that nickel silicide, if used as contact material, decreases the series resistance in cause of a reduced contact resistance.

Integration Of Surface Micromachined Polysilicon Mirrors And A Standard Cmos Process

This paper describes the integration of surface microma chining with polysilicon and a standard CMOS process with aluminium gates. A demultiplexer circuit for addressing a micromachined mirror out of a line of eight mirrors is realized as example. The mirrors are electrostatically deflectable with driving voltages of about 20 V. A diffused p-well is used as counter electrode. Due to the properties of the applied p-well CMOS process with aluminium gates a complete integration of the CMOS process and the surface micromachining is necessary. The applied process is described.

Patch antenna on micromachined silicon

A rectangular microstrip patch antenna, realized as a silicon based monolithic millimeter-wave integrated circuit (SIMMWIC), is presented. The antenna was designed for an operating frequency of 122 GHz and manufactured on micromachined high resistivity silicon-on-insulator (SOI) substrate. Since direct measurements of the far field pattern of an integrated antenna element are difficult at this frequency, a scaled version of the antenna (with a resonant frequency of about 9.6 GHz) was also manufactured. Far field measurements were performed, to determine the antenna performance and compare with numerical results.

Monolithically integrated silicon-IMPATT oscillator at 93 GHz

In this paper monolithically integrated IMPATT diodes are presented. To prove the concept of completely monolithic integration, no special heatsinks or other constructions to optimize cooling were used. The diodes were grown with molecular beam epitaxy on a high resistivity silicon substrate. S-Parameter measurements were performed from 85 GHz up to 110 GHz, showing high negative impedances above the avalanche frequency. Oscillations at a frequency near 93 GHz were observed with the designed resonator circuit.

Monolithically integrated IMPATT diodes for Ka-band transmitters

Emanating from S-parameter measurements on monolithically integrated IMPATT diodes in the Ka-band a completely integrated transmitter is designed and simulated. The resonator is built with coplanar waveguides. A planar slot antenna is used for the emission of the RF signal. To improve the performance of the antenna the silicon substrate has to be thinned to a thickness of 200 /spl mu/m.