Clifford Liem

DSP design tool requirements for embedded systems: a telecommunications industrial perspective

This paper describes the trends in DSP (Digital Signal Processing) for telecommunications design at Bell Northern Research (BNR)1 and the tools needed to address them. The paper is in three parts: First, we present the results of a three month survey of DSP design practices at BNR. We briefly describe the characteristics of the designs, as well as the DSP design tools used. However, the emphasis is on the main bottlenecks in the design process, and the tools required to address them in the future. Then, we present a proposal for a next generation DSP design environment for telecommunication applications, based on the survey results. Particular emphasis will be given to code generation, system-level simulation, and behavioral synthesis, the three most requested design tools. Finally, we provide a description of FlexWare, an embedded software development system which is being developed internally. This system addresses one important aspect of this next generation environment, namely design tools for application-specific instruction-set processors (ASIP). FlexWare is composed of two main components: CodeSyn, a retargetable microcode synthesis system; and Insulin, a VHDL-based instruction set simulation system.

Embedded software in real-time signal processing systems: application and architecture trends

We present an extensive survey of trends in embedded processor use with an emphasis on emerging applications in wireless communication, multimedia, and general telecommunications. We demonstrate the importance of application-specific instruction-set processors (ASIPs) in high-volume, low cost applications. We also examine some of the underlying trends of the applications in which embedded processors are used. This is followed by a description of embedded software development tool requirements. High-performance software compilation emerges as a key requirement. Finally, specific industrial case studies of products in MPEG, videophone, and low-cost digital signal processor (DSP) applications are used to illustrate the architecture design tradeoffs, and highlight specific tool requirements. A companion paper (Goosens et al., 1997) presents a comprehensive survey of embedded software development tools, focusing mostly on retargetable software compilation.

FlexWare : A Flexible Firmware Development Environment for Embedded Systems

The Flexware system is a software/firmware development environment for application specific instruction set processors (ASIPs) and commercial processors. It is currently composed of two main tools : 1. An instruction set simulator, INSULIN, which provides a cycle true VHDL based simulation environment for a user defined instruction set. The use of INSULIN has allowed to model in-house (two DSPs and one microcontrol ASIP) and commercial processors (e.g. the Intel 80C196 and SGS-Thomson ST7291 microcontrollers, as well as the SGS-Thomson ST18950 DSP) in a fraction of the time required for a manually developed model. Execution times are in the order of thousands of instructions per second on a Sparc 2. 2. A retargetable code generator, CODESYN, which takes one or more algorithms expressed in a high-level language and maps them onto a user defined instruction set to produce optimized machine code for a target ASIP or a commercial processor core. The development of a CODESYN based compiler for a DSP ASIP produced results within 20% of hand coded assembler.

Embedded software in real-time signal processing systems: design technologies

The increasing use of embedded software, often implemented on a core processor in a single-chip system, is a clear trend in the telecommunications, multimedia, and consumer electronics industries. A companion paper (Paulin et al., 1997) presents a survey of application and architecture trends for embedded systems in these growth markets. However, the lack of suitable design technology remains a significant obstacle in the development of such systems. One of the key requirements is more efficient software compilation technology. Especially in the case of fixed-point digital signal processor (DSP) cores, it is often cited that commercially available compilers are unable to take full advantage of the architectural features of the processor. Moreover, due to the shorter lifetimes and the architectural specialization of many processor cores, processor designers are often compelled to neglect the issue of compiler support. This situation has resulted in an increased research activity in the area of design tool support for embedded processors. This paper discusses design technology issues for embedded systems using processor cores, with a focus on software compilation tools. Architectural characteristics of contemporary processor cores are reviewed and tool requirements are formulated. This is followed by a comprehensive survey of both existing and new software compilation techniques that are considered important in the context of embedded processors.

Industrial experience using rule-driven retargetable code generation for multimedia applications

Abstract: The increasing usage of application-specific instruction set processors (ASIPs) in audio and video telecommunications has made strong demands on the rapid availability of dedicated compilers. A rule-driven approach to code generation may have benefits over model-based approaches as the user is not confined to the capabilities supported by the model. However, the sole use of transformation rules may or may not be sufficient in optimization abilities depending on the target architecture. This paper outlines experiences with a rule-driven code generation approach for two applications in audio and video processing. The first is a controller for the VideoPhone codec at SGS-Thomson Microelectronics. The second is a VLIW (very large instruction word) processor for high-fidelity and MPEG audio at Thomson Consumer Electronic Components. The experience has shown that a rule-driven approach to compilation is applicable to both the controller and VLIW architectures; however, is limited in optimization abilities for the latter.

High-level synthesis and codesign methods: an application to a videophone codec

This paper describes a high-level multi-HDL design process applied to an industrial design of a single chip Videophone Codec. It makes use of many state-of-the-art design tools and methods: Behavioural VHDL control path synthesis for the controller of the Codec motion estimator; behavioural DSP synthesis from Silage to generate an application-specific calculation unit that performs vector prediction for the motion estimator; retargetable C compilation for an embedded application-specific microcontroller and multi-level (behavioural, RTL, gate) and multi-language (VHDL, Silage, C) co-simulation. We show that, with respect to a manual design process, the use of these tools led to the following results: a five-fold reduction in the source HDL description complexity; equal or better timing performance; silicon area within 15% (4% area overhead for the DSP operator, and 14% overhead for the controller) and automatically compiled assembly code (from ANSI C descriptions) that is as compact as hand-coded assembler. We also identified a strong need to pay attention to design verification issues, especially when dealing with multi-level descriptions and multiple languages. Validation of the design was the single most time consuming part of the process.

Compilation Techniques and Tools for Embedded Processor Architectures

Compiler technology and firmware development tools are becoming a key differentiator in the design of embedded processor-based systems. This chapter presents a look at trends in embedded processor architectures. Highperformance applications such as multimedia, wireless communications, and telecommunications require new design methodologies. The key trend in embedded CPUs is the Application Specific Instruction-Set Architecture or ASIP—a processor designed for a particular application or family of applications.

Trends In Embedded Systems Technology

While there has been much talk on the necessity of a major breakthrough in design methods and advanced CAD to support the multi-million gate chips that are already a reality, there has not been a clearly identified new direction which will produce a major productivity breakthrough. This paper attempts to identify one of these productivity breakthroughs, through: 1. an analysis of designer needs, 2. a study of embedded systems trends in the industry, 3. case studies in wireless communications and multi-media.

Am embedded system case study: the firm ware development environment for a multimedia audio processor

This paper outlines a case study at SGS-Thomson Microelectronicson the development of a firmware development environment in co-operationwith Thomson Consumer Electronics Components. Theenviornment is for an embedded processor used for audiodecompression algorithms including: MPEG2, Dolby AC-3 Surround,and Dolby Pro-logic. The enabling component of the firmwareenvironment is a retargetable compiler which maps high-levelalgorithms onto the embedded processor. Although compilation is thecritical technology, this experience has shown that it is insufficient andthat other supporting design tools are also important. For this project,that environment includes an instruction-set simulator, a source-leveldebugger, a custom linker, and a compiler validation strategy. Themethodologies are outlined in this paper with an emphasis on thelessons learned in this hardware-software team development.

ReCode: the design and re-design of the instruction codes for embedded instruction-set processors

This abstract presents a design aid called ReCode, and describes its use in the analysis of existing instruction-set processors. ReCode allows the exploration of the relationship between the instruction-set and the corresponding application code of embedded processors. After analyzing the instruction-set and code, the designer can then use the set of editing functions to adjust the instruction set to the application code. ReCode is a window-based tool which has two modes of analysis: static and dynamic. In the static mode, the tool allows the user to analyze the correspondence between the use of assembly codes and the compiled application code. This allows the designer to identify codes which have poor utilization and make changes accordingly. As the tool works with an instruction-set specification which can be regenerated, the compiler is consequently retargeted automatically for any changes.