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Dive into the research topics where Cristian Estan is active.

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Featured researches published by Cristian Estan.


programming language design and implementation | 2013

A general constraint-centric scheduling framework for spatial architectures

Tony Nowatzki; Michael Sartin-Tarm; Lorenzo De Carli; Karthikeyan Sankaralingam; Cristian Estan; Behnam Robatmili

Specialized execution using spatial architectures provides energy efficient computation, but requires effective algorithms for spatially scheduling the computation. Generally, this has been solved with architecture-specific heuristics, an approach which suffers from poor compiler/architect productivity, lack of insight on optimality, and inhibits migration of techniques between architectures. Our goal is to develop a scheduling framework usable for all spatial architectures. To this end, we expresses spatial scheduling as a constraint satisfaction problem using Integer Linear Programming (ILP). We observe that architecture primitives and scheduler responsibilities can be related through five abstractions: placement of computation, routing of data, managing event timing, managing resource utilization, and forming the optimization objectives. We encode these responsibilities as 20 general ILP constraints, which are used to create schedulers for the disparate TRIPS, DySER, and PLUG architectures. Our results show that a general declarative approach using ILP is implementable, practical, and typically matches or outperforms specialized schedulers.


architectures for networking and communications systems | 2012

LEAP: latency- energy- and area-optimized lookup pipeline

Eric Nathaniel Harris; Samuel Lawrence Wasmundt; Lorenzo De Carli; Karthikeyan Sankaralingam; Cristian Estan

Table lookups and other types of packet processing require so much memory bandwidth that the networking industry has long been a major consumer of specialized memories like TCAMs. Extensive research in algorithms for longest prefix matching and packet classification has laid the foundation for lookup engines relying on area- and power-efficient random access memories. Motivated by costs and semiconductor technology trends, designs from industry and academia implement multi-algorithm lookup pipelines by synthesizing multiple functions into hardware, or by adding programmability. In existing proposals, programmability comes with significant overhead. We build on recent innovations in computer architecture that demonstrate the efficiency and flexibility of dynamically synthesized accelerators. In this paper we propose LEAP, a latency-energy- and area- optimized lookup pipeline based on an analysis of various lookup algorithms. We compare to PLUG, which relies on von-Neumann-style programmable processing. We show that LEAP has equivalent flexibility by porting all lookup algorithms previously shown to work with PLUG. At the same time, LEAP reduces chip area by 1.5×, power consumption by 1.3×, and latency typically by 5×. Furthermore, programming LEAP is straight-forward; we demonstrate an intuitive Python-based API.


ieee hot chips symposium | 2014

Memory processing units

Jaikrishnan Menon; Lorenzo De Carli; Vijayraghavan Thiruvengadam; Karthikeyan Sankaralingam; Cristian Estan

Presents a conference poster that addresses the technology of memory processing units. Some of the following topics are examined: current processing capabilities; MPU hardware; performance and energy output; and new trends in the industry.


ACM Transactions on Programming Languages and Systems | 2015

A Scheduling Framework for Spatial Architectures Across Multiple Constraint-Solving Theories

Tony Nowatzki; Michael Sartin-Tarm; Lorenzo De Carli; Karthikeyan Sankaralingam; Cristian Estan; Behnam Robatmili

Spatial architectures provide energy-efficient computation but require effective scheduling algorithms. Existing heuristic-based approaches offer low compiler/architect productivity, little optimality insight, and low architectural portability. We seek to develop a spatial-scheduling framework by utilizing constraint-solving theories and find that architecture primitives and scheduler responsibilities can be related through five abstractions: computation placement, data routing, event timing, resource utilization, and the optimization objective. We encode these responsibilities as 20 mathematical constraints, using SMT and ILP, and create schedulers for the TRIPS, DySER, and PLUG architectures. Our results show that a general declarative approach using constraint solving is implementable, is practical, and can outperform specialized schedulers.


Archive | 2012

Hybrid Memory for Search Operations

Cristian Estan; Mark Birman; Prashanth Narayanaswamy


IEEE Micro | 2016

Near-Memory Data Services

Babak Falsafi; Mircea R. Stan; Kevin Skadron; Nuwan Jayasena; Yunji Chen; Jinhua Tao; Ravi Nair; Jaime H. Moreno; Naveen Muralimanohar; Karthikeyan Sankaralingam; Cristian Estan


ACM Sigarch Computer Architecture News | 2013

Constraint centric scheduling guide

Michael Sartin-Tarm; Tony Nowatzki; Lorenzo De Carli; Karthikeyan Sankaralingam; Cristian Estan


Archive | 2012

Targeted search system with de-obfuscating functionality

Greg Watson; Cristian Estan; Mark Birman; Alexei Starovoitov


architectures for networking and communications systems | 2013

SWSL: software synthesis for network lookup

Sung Jin Kim; Lorenzo De Carli; Karthikeyan Sankaralingam; Cristian Estan


Archive | 2012

Organizing Data in a Hybrid Memory for Search Operations

Cristian Estan; Mark Birman; Prashanth Narayanaswamy

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Lorenzo De Carli

University of Wisconsin-Madison

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Michael Sartin-Tarm

University of Wisconsin-Madison

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Tony Nowatzki

University of Wisconsin-Madison

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Eric Nathaniel Harris

University of Wisconsin-Madison

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