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Dive into the research topics where Cristina López-Bravo is active.

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Featured researches published by Cristina López-Bravo.


IEEE Computer | 2011

Experiences inside the Ubiquitous Oulu Smart City

Felipe J. Gil-Castiñeira; Enrique Costa-Montenegro; Francisco J. González-Castaño; Cristina López-Bravo; Timo Ojala; Raja Bose

The UrBan Interactions (UBI) research program, coordinated by the University of Oulu, has created a middleware layer on top of the panOULU wireless network and opened it up to ubiquitous-computing researchers, offering opportunities to enhance and facilitate communication between citizens and the government.


international conference on communications | 2009

Practical Scalability of Wavelength Routing Switches

Miguel Rodelgo-Lacruz; Cristina López-Bravo; Francisco J. González-Castaño; H.J. Chao

Packet switches with optical fabrics can potentially scale to higher capacities. It is also potentially possible to improve their reliability, and reduce both their footprint and power consumption. A well-known alternative for implementing hardwired switches is Arrayed Waveguide Grating (AWG). Ideally, AWG insertion losses do not depend on the number of input-output ports, meaning that scalability is theoretically infinite. However, accurate second-order assessment has demonstrated that in-band crosstalk exponentially increases the power penalty, limiting the realistic useful size of AWG commercial devices to about 10-15 ports (13-18 dB) [1]. On the other hand, the in-band crosstalk at AWG outputs depends on the connection pattern set by the scheduling algorithm and this port count limitation is calculated for worst-case scenarios. In this paper, we show that distributed schedulers with predetermined connection patterns can be used to avoid these harmful arrangements. We also show that the probability of worst-case patterns is very low, allowing us to set a more realistic port limit for general centralized schedulers and very small losses. With these results, we calculate more realistic port count limits for both scheduler types.


optical network design and modelling | 2007

Enhanced parallel iterative schedulers for IBWR optical packet switches

Miguel Rodelgo-Lacruz; Pablo Pavon-Marino; Francisco J. González-Castaño; Joan Garcia-Haro; Cristina López-Bravo; J. Veiga-Gontan

In this paper we propose an enhanced parallel iterative scheduler for IBWR synchronous slotted OPS switches in SCWP mode. It obtains a maximal matching of packet demands without resource conflicts. The analytical and numerical results are highly competitive regarding previous work.


international conference on transparent optical networks | 2006

GMPLS Optical Packet Switching Networks: Optical vs. Electronic Feasibility

J. Veiga-Gontan; Pablo Pavon-Marino; Javier Vales-Alonso; Joan Garcia-Haro; M. Rodelgo; Cristina López-Bravo; Francisco J. González-Castaño

This paper surveys and analyzes the GMPLS extensions proposed for synchronous slotted optical packet switching (OPS) networks, from the point of view their impact on the switching node design. First, we examine the state-of-the-art in a set of GMPLS-aware functions. In the optical side, we focus on label coding and detection techniques. In the electronic side, we concentrate on ingress traffic buffering, packet assembly, scheduling and forwarding table lookup. Then, we discuss the existing techniques, and comparatively assess their feasibility and practical implementation for the different GMPLS proposals investigated. The traffic engineering capabilities of the different GMPLS solutions are then balanced to their impact on the node cost


IEEE\/OSA Journal of Optical Communications and Networking | 2009

Not-Aligned Optical Cell Switching Paradigm

M. Rodelgo-Lacruz; Cristina López-Bravo; F.J. Gonzalez-Castao; F. Gil-Castieira; H.J. Chao

Most existing all-optical switching paradigms assume that different wavelengths are switched independently, which limits the scalability of core switches. In the optical cell switching (OCS) paradigm, time is divided into time slots of fixed size by time-division multiplexing, and the wavelengths in a time slot are all bundled. Thus, each OCS core switch (OCX) requires a single switching plane and performs mere time-space switching. In OCS, each OCX requires optical slot synchronizers (OSYNs) at all inputs for the arrival slots to be aligned so that cells can be simultaneously forwarded. We propose a new OCS paradigm-not-aligned OCS-where the alignment process takes place inside the OCXs. In not-aligned OCS, no OSYNs are required, and the alignment resources are shared between all input fibers. Therefore, the proposal fulfills diverse objectives: the total number of fiber delay loops and the hardware cost are reduced, and the number of switching operations is also lower than in aligned OCS. Moreover, cell arrival time at the switch is not critical, and the network becomes simpler and more flexible. We also propose a new scheduling algorithm for not-aligned OCS networks. We provide simulation results that show that the not-aligned OCS schema takes the connection blocking probability to reasonable values.


International Journal of Communication Systems | 2007

Decoupled parallel hierarchical matching schedulers

Francisco J. González-Castaño; Cristina López-Bravo; Miguel Rodelgo-Lacruz; Rafael Asorey-Cacheda

The load balanced Birkhoff–von Neumann switch is an elegant VOQ architecture with two outstanding characteristics: (i) it has a computational cost of O(1) iterations and (ii) input controllers do not exchange information (as a result, it allows decoupled implementations with a low power density). The load balancing stage guarantees stability under a broad class of traffic patterns. It may alter packet sequence, but this can be solved with appropriate packet selection strategies. The average packet delay caused by previous maximal size matching algorithms, such as iSLIP, RDSRR, or PHM is noticeably lower than that of a Birkhoff–von Neumann switch, especially for low and medium loads. However, they need tightly coupled VOQ controllers, which implies higher power density. For example, this makes difficult to apply those algorithms to optical switching architectures. Moreover, they require O(log2N) iterations to converge, and this computational cost may be unacceptable for the slot lengths in optical packet switches. In this paper, we propose a family of decoupled Parallel Hierarchical Matching (PHM) VOQ controllers (DPHM). They outperform the Birkhoff–von Neumann scheduler, which can be viewed as a member of the family (in fact, the simplest one). DPHM schedulers have a computational cost of O(1) iterations and, unlike last generation maximal size matching algorithms, they allow a low input controller interconnection complexity (low power density switch implementation). Copyright


global communications conference | 2009

A Joint Interchannel and Network Coding Schema for nVoD Services over Wireless Mesh Networks

Rafael Asorey-Cacheda; Hong Huang; Francisco J. González-Castaño; Eric E. Johnson; Cristina López-Bravo; Felipe J. Gil-Castiñeira

As wireless mesh networks become more widely deployed, media streaming in such networks poses a pressing research issue because of the increasing importance of multi-media applications. The challenge with wireless mesh networks is the time-varying wireless channel compounded by multi-hop transmission. However, wireless mesh networks also present an opportunity, i.e., the redundancy provided by broadcast wireless media and mesh connectivity. In this paper, we present a joint interchannel and network coding schema to take advantage of this opportunity and to overcome the challenge of wireless mesh networks. We evaluate of the proposed joint coding through both mathematical analysis and computer simulation. The results demonstrate significant benefits in terms of protection against packet losses and bandwidth utilization of the joint coding schema.


European Transactions on Telecommunications | 2009

Guaranteeing packet order in IBWR optical packet switches with parallel iterative schedulers

Miguel Rodelgo-Lacruz; Pablo Pavon-Marino; Francisco J. González-Castaño; Joan Garcia-Haro; Cristina López-Bravo; J. Veiga-Gonátn; Felipe J. Gil-Castiñeira; Carla Raffaelli

The input-buffered wavelength-routed (IBWR) switch is a scalable switch fabric for optical packet switching (OPS) networks. In synchronous operation, when optical packets are of a fixed duration and aligned at switch inputs, the scheduling of this architecture can be characterised by a type of bipartite graph matching problem. This challenges the design of feasible algorithms in terms of implementation complexity and response time. A previous work presented and evaluated the insistent parallel desynchronized block matching (I-PDBM) algorithm for the IBWR switch. I-PDBM is a parallel iterative scheduler with a good performance and a simple hardware implementation. However, the algorithm does not maintain the packet sequence. In this paper, we present the I-PDBM algorithm with packet ordering (OI-PDBM), which prevents mis-sequencing and behaves as I-PDBM in terms of delay, buffer requirements and convergence speed. Copyright


European Transactions on Telecommunications | 2009

LBWS : a load-balanced distributed scheduler for WASPNET optical packet switches

Cristina López-Bravo; Francisco J. González-Castaño; Miguel Rodelgo-Lacruz; Pablo Pavón-Mariño; Joan García-Haro

In this paper we propose a novel scheduling approach for optical packet switching (OPS) WASPNET nodes, LBWS. Unlike the original WASPNET description, our scheduler is fully distributed and its computational cost is independent from switch size. This allows shorter packets, improving network performance. Based on a deterministic evolution of the switch configuration, our scheduling algorithm predicts packet delays at packet ingress to guarantee switch stability, and assigns fibre delay lines (FDLs) accordingly. It is not necessary to emulate RAM memories, since we assign delay lines according to packet delay predictions. We demonstrate that LBWS outperforms WASPNET in the cases studied, for nonuniform input traffic. Copyright


international symposium on computers and communications | 2003

Analysis of parallel hierarchical matching schedulers for input-queued switches under different traffic conditions

Francisco J. González-Castaño; Cristina López-Bravo; Rafael Asorey-Cacheda

Input-queued packet switches are more scalable than output-queued ones. However, due to HOL blocking, their throughput is poor. The virtual output queueing (VOQ) switch architecture and several buffer schedulers have been proposed to overcome this problem. Among them, the class of iterative maximal matching algorithms, with the first example being parallel iterative matching (PIM), which uses random selection, and iSLIP that uses round-robin selection, and has become a de facto standard in switching research. iSLIP admit efficient practical implementations, and has several variants with different pointer updating strategies - like FIRM, DRRM and RDSRR - that improve performance. In previous work, we formulated a new scheduler, parallel hierarchical matching (PHM), which compare favorably to iSLIP-like algorithms. PHM can be considered a parallelization of previous high-performance sequential hierarchical matching algorithms, like 2DRR or WWFA. In this paper, we compare their delay performance for same decision response-time, determined from ASIC implementations, and for different traffic models.

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