D. Goldner

Realization of a second level neural network trigger for the H1 experiment at HERA

Abstract Since 1996 the H1 experiment is fully equipped with two independent fast pattern recognition systems operating as second level triggers (L2). The decision time is 20 μs. One of the two is the neural network trigger. It runs an array of presently ten VME-boards with CNAPS 1064 chips (20 MHz, 128 Mcps) by Adaptive Solutions. The input trigger data from the detector components arrive in various formats on a 8 × 16 bit wide 10 MHz bus. Before usable as 8-bit input values to the CNAPS they are preprocessed by several bit-manipulating algorithms and arithmetic functions implemented on XILINX 4008 field programmable gate arrays (FPGA). The startup strategy for the new system is to concentrate on photoproduction channels or low multiplicity final states which so far could only be efficiently triggered with unacceptable high rates.

Artificial Neural Networks as a Level-2 Trigger for the H1 Experiment: Status of the Hardware Implementation

Triggering at the HERA ep collider is challenging because of the high bunch crossing rate and an expected large background. In the H1 experiment, a trigger decision is made in four steps (level 1–4), stepwise decreasing the event rate and allowing for more sophisticated trigger decisions. The time available for L2 is about 20 μs. We have proposed to use an artificial neural network (ANN) for the L2 trigger based on the CNAPS-1064 chip available from Adaptive Solutions, (Oregon, USA). The intrinsic parallelism of the ANN algorithm together with the dedicated hardware offers fast processing of the trigger informations. The trigger system uses up to 10 decision units, each consisting of a Pattern Recognition Module (PRM) and a Data Distribution Board (DDB). A DDB receives the L2 data stream and generates the network inputs used by the algorithms on the PRM. A PRM is a commercial VME board carrying the CNAPS processors.