D.J. Newson

Influence of domain formation on the V/sub ds/ dependence of noise and gate leakage in InGaAs FETs

A model for high gate leakage currents in InGaAs-channel FETs is described. Such leakage is caused by running gate metal down an unpassivated mesa. Even when an airbridge is used, gate leakage is higher than anticipated from the sum of source-gate and drain-gate diode currents. Measurements of typical leakage and transconductance for a 1 mu m HFET at V/sub ds/=2 V are presented. The leakage is much higher than that observed at V/sub ds/=0 V. It is shown that, in JFETs and HFETs, reducing the doping level leads to a near-exponential decrease in leakage currents. Properly designed HEMTs can have low gate leakage in the high gain region.<<ETX>>

Wide-band transitions for applications in MMIC's and OEIC's

Three different coplanar waveguide-to-slotline transitions on InP for operation around 30 GHz were designed. The performances of these transitions in back-to-back configuration were simulated and measured over 1-50 GHz. They were found to possess wideband characteristics. In particular, two of them had bandwidths as large as 35 GHz. The design of these transitions were carried out with the view to monolithically integrating tapered slot antennas with coplanar waveguide circuits on InP substrates.<<ETX>>

Influence of buffer layer material on InGaAs FET optimisation

A study was performed to investigate whether the noise performance of delta-doped heterostructure-insulated-gate FETs (HIGFETs) is adequate for optical receiver applications. The suitability of gate insulator and buffer layers of both AlInAs and InP was investigated. The former has the wider bandgap and will thus give better confinement and lower gate leakage currents, whereas InP has the prospect of reduced trapping and thus of lower noise. The test structures and experimental procedures are described, and the results are discussed. It is found that the lower trap density of InP buffer layers does result in better noise performance if the bias conditions are chosen to minimize the effect of the poorer carrier confinement of InP.<<ETX>>

High performance diffused InGaAs JFETs in OEICs

The development of highly uniform diffused InGaAs JFETs for use in vertically integrated optoelectronic integrated circuits (OEICs) is discussed. The devices have been integrated with both PIN diodes and ridge-waveguide lasers. OEIC fabrication and OEIC receiver performance are discussed.<<ETX>>