D. Lootens

Non-planar MOVPE growth using a novel shadow-masking technique

Abstract The growth of GaAs/AlGaAs multilayer structures on shadow-masked substrates by metalorganic vapour phase epitaxy is reported. A novel shadow-masking technique is introduced which makes use of epitaxial layers for spacer and mask and which is defined by lithography and reactive ion etching. Growth velocity variations up to a factor of 5 have been observed when varying the window width in the shadow mask. This technique finds interesting applications for locally changing the bandgap of quantum well material. Single quantum well light emitting diodes showed a variation in emission wavelength between 815 and 850 nm.

Study of electrical damage in GaAs induced by SiCl4 reactive ion etching

In the last decade reactive ion etching has become a very important tool for the patterning of submicron features. Although the particle energies involved in this etching process are relatively low, they still are high enough to alter the characteristics of semiconductor materials. In this paper we report on the electrical damage in n‐ and p‐type GaAs induced by SiCl4 reactive ion etching. We found that the etching process causes significant electrical damage extending hundreds of nm deep in the p‐GaAs but in n‐GaAs only minor changes are observed. The changes in p‐GaAs are thought to be due to the formation of EL2 point defects in a concentration comparable to the dopant concentration. Possible explanations for the observed differences in damage between p‐ and n‐type material are given.

Crack formation and thermal stress relaxation of GaAs on Si growth by metalorganic vapor phase epitaxy

In this letter we report on the use of selective metalorganic vapor phase epitaxy growth as an original tool to alleviate the problem of random formation of microcracks in thick GaAs‐on‐Si heteroepitaxial layers. Through the use of a special mask design including the definition of sharp wedges in the SiO2 mask material, the thermally induced stress in the GaAs‐on‐Si layers preferentially relaxes at precisely located sites on the substrate. The influence of mask configuration, wedge shape, wedge orientation, and layer thickness on microcrack formation has been investigated. Results obtained show that small‐area SiO2 wedges are useful for the definition of microcrack location, and thus eventually for optoelectronic device processing.

Dry etching of III-V semiconductors : influence of substrate temperature on the anisotropy and induced damage

Abstract During reactive ion etching (RIE) of GaAs and InP with SiCl 4 , many different parameters will influence the etched profile. Among these process parameters, the substrate temperature is frequently neglected, but plays a very important role. While etching InP, not only the profile, but also the surface roughness is influenced. Beside geometrical effects, the optical and electrical damage for p and n-type GaAs, induced during RIE, is evaluated using photoluminescence and Schottky diode I–V and C–V measurements. SIMS was used to check for incorporation of plasma species. No great influence of the substrate heating on the damage was found.

Monolithic Integration Of GaAs Electronics And Inp Waveguides For Long Wavelength Optical Switching Networks.

GaAs MESFETs are very promising for the fabrication of the electronic part of long wavelength InP-based optoelectronic integrated circuits. A special growth procedure has been developed for the heteroepitaxial growth of GaAs on InP. This resulted in MESFET performances similar to results obtained on GaAs substrates. A transconductance of 100 mS/mm and a cutt-off frequency of 7 GHz was obtained for 1.5μm gate MESFETs. The monolithic integration of GaAs MESFETs and InP buried waveguides did not influence their performances.

Influence of SiCl4 Reactive Ion Etching on the Electrical Characteristics of GaAs

SiCl4‐RIE causes electrical damage to GaAs strongly related to doping type and level. Changes in C‐V and DLTS‐measurements can be related to EL2‐defects. Explanations for observed differences in n‐type and p‐type material will be presented.

Crack Formation and Selective Growth in MOVPE-GaAs on Si and its Application to OEICs

The potential technological advantages of growing GaAs on Si, such as the development of a new generation of OEICs, has attracted a large research effort during recent years. Many problems encountered in the hetero-epitaxxal growth such as lattice ndsmatch, anti-phase boundaries, pre-growth cleaning and difference in thermal expansion coefficients, nave been extensively studied In particular the thermal mismatch between the two materials involved is still a severe problem, since it induces a high tensile stress within the GaAs layer on cooling down from the epitaxial growth temperature. These stresses cause the wafer to bend, which, harriers lithography and further processing. Above a certain strain level, this means thicker epilayers, nucrocracks will appear in the GaAs along its cleaving directions, reducing the material stresses. These arbitrarily occurlng microoracks form isolated regions In the layerstructure which may cause improper device operation In this paper selective growth has been used In an original way to solve the problem of random crack formation In thick GaAs on Si layers [ 1 ]. The hetero-epitaxial growth was carried out in a small MOVPE system working at atmospheric pressure. The sources used are TMG and a 5% mbcture of AsEL in