D.M. Van de Sype

Digitally controlled boost power-factor-correction converters operating in both continuous and discontinuous conduction mode

Whereas power-factor-correction (PFC) converters for low-power ranges (less than 250 W) are commonly designed for operation in the discontinuous conduction mode, converters for higher power levels are operated in the continuous conduction mode. Nevertheless, when these converters are operated at reduced power, discontinuous conduction mode will appear during parts of the line period, yielding input current distortion. This distortion can be eliminated by employing a dedicated control algorithm, consisting of sample correction and duty-ratio feedforward. The reduction of the harmonic distortion of the input current and the increase of the power factor are demonstrated by experiments on a 1-kW boost PFC converter.

Input-Current Distortion of CCM Boost PFC Converters Operated in DCM

When power-factor correction (PFC) converters designed for operation in continuous-conduction mode (CCM) at full power are operated at reduced load, operation in discontinuous-conduction mode (DCM) occurs in a zone that is close to the crossover of the line voltage. This zone will gradually expand with decreasing load to finally encompass the entire line cycle. Whereas, in CCM, the parasitic capacitances of the switches only cause switching losses, in DCM, they are a source of converter instability, resulting in significant input-current distortion. In this paper, this source of input-current distortion is analyzed, and a solution is proposed. Experimental results are obtained using a digitally controlled boost PFC converter, which is designed to operate in CCM for 1 kW

Small-signal Laplace-domain analysis of uniformly-sampled pulse-width modulators

As the performance of digital signal processors has increased rapidly during the last decade, there is a growing interest to replace the analog controllers in low power switching converters by more complicated and flexible digital control algorithms. Compared to high power converters, the control loop bandwidths for converters in the lower power range are generally much higher. Because of this, the dynamic properties of the uniformly-sampled pulse-width modulators used in low power applications become an important restriction for the maximum achievable bandwidth of control loops. After the discussion of the most commonly used uniformly-sampled pulse-width modulators, small-signal frequency- and Laplace-domain models for the different types of uniformly-sampled pulse-width modulators are derived theoretically. The results obtained are verified by means of experimental data retrieved from a test setup.

Small-signal z-domain analysis of digitally controlled converters

As the performance of microcontrollers has increased rapidly during the last decade, there is a growing interest to replace the analog controllers in low power switching converters by more complicated and flexible digital control algorithms. Compared to high power converters, the control loop bandwidths for converters in the lower power range are generally much higher. Because of this, the dynamic properties of the uniformly-sampled pulse-width modulators (PWMs) used in low power applications become an important restriction to the maximum achievable bandwidth of the control loop. Though frequency- and Laplace-domain models for uniformly-sampled PWMs are very valuable as they improve the general perception of the dynamic behavior of these modulators, the direct discrete design of the digital compensator requires a

Design issues for digital control of boost power factor correction converters

z

Input current distortion of CCM boost PFC converters operated in DCM

-domain model for the combination modulator and converter. For this purpose a new exact small-signal

Gate-drive circuit for zero-voltage-switching half-and full-bridge converters

z

A single switch boost converter with a high conversion ratio

-domain model is derived. In accordance with the zero-order-hold equivalent commonly used for “regular” digital control systems, this

A sampling algorithm for digitally controlled boost PFC converters

z

Ferrite losses of cores with square wave voltage and DC bias

-domain model gives rise to the development of a uniformly-sampled PWM equivalent of the converter. This