D. Muñoz

Laser assisted patterning of hydrogenated amorphous silicon for interdigitated back contact silicon heterojunction solar cell

This work reports on the elaboration of a new industrial process based on laser selective ablation of dielectric layers for Interdigitated Back Contact Silicon Heterojunction (IBC Si-HJ) solar cells fabrication. Choice of the process is discussed and cells are processed to validate its performance. A pulsed green laser (515nm) with 10-20ns pulse duration is used for hydrogenated amorphous silicon (a-Si:H) layers patterning steps, whereas metallization is made by screen printed. High Open-Circuit Voltage (Voc=699mV) and Fill Factor (FF=78.5%) values are obtained simultaneously on IBC Si-HJ cells, indicating a high surface passivation level and reduced resistive losses. An efficiency of 19% on non textured 26 cm² solar cells has been reached with this new industrial process.

SLASH concept: A novel approach for simplified interdigitated back contact solar cells fabrication

In this study a novel high efficiency crystalline silicon (c-Si) solar cell concept is presented. It combines Interdigitated Back Contact (IBC) structures with Silicon Heterojunction (Si-HJ) technology through the use of Laser assisted patterning steps. The SLASH (Structuring by Laser Ablation of Silicon Heterojunction) IBC cell shows a simplified geometry and a fabrication process compatible with mass production. SLASH IBC cells have been fabricated using optimized parameters for a-Si:H layers patterning and screen printed metallization. The c-Si surface morphology (polishing and texturation process) is shown to have a great impact on the cells parameters. Almost the same cell performances are obtained on alkaline and chemical-mechanical polished surfaces. An efficiency of 19.0% has been obtained on 5*5 cm2 devices proving the high efficiency potential of this simplified IBC structure.

Influence of the emitter coverage on interdigitated back contact (IBC) silicon heterojunction (SHJ) solar cells

Modelling and experimental results on IBC SHJ solar cells are presented in this paper. Different rear emitter designs are studied by 2D simulation and tested on experimental devices. IBC SHJ cells are fabricated with the SLASH process based on laser patterning steps, and the performance of such devices is shown to be limited by the rear emitter geometry (contacting scheme and total emitter fraction). On one hand IBC SHJ cells have to be carefully designed concerning the contacting scheme due to distributed series resistance effects. On the other hand SHJ technology allows a very high surface passivation level, and this reduces the influence of the emitter fraction on the cells performances.

a-Si:H/c-Si Heterojunction Solar Cells: A Smart Choice for High Efficiency Solar Cells

In this chapter, we start by a short presentation of the state-of-the art of the energy market to understand the evolution of the energetic demand and the role of photovoltaic technology in the near future. Moreover, we present all the actual industrial high efficiency solar cells among which is located the heterojunction technology. Then, we talk about the key points that define the technology, the main bottlenecks and the main solutions found at INES research group on heterojunction devices. Also, we show our best results obtained recently and some guidelines to improve still more the efficiency of the devices. Finally, we finish by a summary of the main advantages of this technology taking into account all the parameters described above.

Towards industrialization of a-Si:H/c-Si heterojunction cells: From 20.5% record cells to 19.8% efficiency on industry compatible 148.5cm 2 Cz wafers

In this paper, we present our recent work concerning the industrialization of hydrogenated amorphous/crystalline silicon heterojunction cells (a-Si:H/c-Si HET). Indeed, if efficiencies up to 20.5% have already been announced by INES solar cell group, not all developed processes are fully compatible with industrial constraints because of cost and throughput concerns mainly. Thus, we propose to analyze further, step by step, the process adaptations needed to be compatible with industry requirements. Performing in-house experiments, we can estimate properly main efficiency loss steps (wafer quality, metallization...etc.) and propose solutions to maximize solar cell batch performance, uniformity, repeatability and costs. Based on all this learning, fully industry compatible a-Si:H/c-Si HET solar cells on 148.5cm2 Cz wafers have been processed with demonstrated efficiencies up to 19.8%. For specific bifacial HET solar cells, efficiency up to 19.4% has been measured, with bifacial ratio higher than 90% (illuminated back side efficiency compared to standard front side illumination efficiency).

Strategies of cost reduction and high performance on a-Si:H/c-Si heterojunction solar cells: 21% efficiency on monolike substrate

In the actual PV context, it is mandatory to address cost reduction maintaining very high efficiency to be competitive. In the case of amorphous/crystalline heterojunction technology (HET), cost pareto is driven by Silver consumption by screen printing pastes followed by Silicon substrate. One option is to substitute Silver by Cu plating. Regarding material costs, monocrystalline (i.e, Czochralski (Cz) or Float-Zone (FZ)) silicon wafers might be also replaced by the so-called monolike or quasi-mono silicon in order to reduce the cost of the required high quality substrates In this paper, we show the latest results integrating both options on HET solar cell developments. Monolike processes have been optimized to reach excellent bulk quality, leading to effective carrier lifetimes over 1ms and implied open circuit voltage over 720mV comparable to Cz silicon. The combination with a Cu-plating metallization on an optimized structure, INES has reached over 21% efficiency on large area devices.

Progress in scaling-up silicon heterojunction solar cells: 16% efficiency obtained on 125 PS monocrystalline silicon

In this work, we have studied the scalability of our fabrication process for heterojunction solar cells up to 148.5cm2 total area. Double heterojunction devices were fabricated on both n- and p-type textured substrates using only doped (n) and (p) a-Si:H layers. ITO was used as anti-reflective coating and evaporated Aluminum as the metallic back contact. Finally, an Ag grid was screen-printed at the front side. Efficiencies higher than 16% have been obtained in both cases demonstrating the homogeneity and robustness of our fabrication process for larger substrates. Nevertheless, there is still room for improvement especially in terms of passivation, the Voc values are still low (≪640mV), though it is a promising result considering that no intrinsic layer has been used.