D. Rendusara

An improved inverter output filter configuration reduces common and differential modes dv/dt at the motor terminals in PWM drive systems

In this paper, an improved inverter output filter is proposed for pulsewidth-modulated (PWM) drive systems. The proposed filter is shown to effectively reduce both the differential and common modes dv/dt at the motor terminals, even in the presence of long motor leads. Reducing differential mode dv/dt reduces overvoltages at the motor terminals and lowers the stress on the motor insulation. Lowering common mode dv/dt is shown to significantly reduce high-frequency leakage currents to ground and induced shaft voltage in the motor. An important advantage of the approach is that the filter can be installed within the inverter enclosure to achieve both the differential and common modes dv/dt reductions at the motor terminals. Thus, the use of the filter can contribute to enhanced bearing life and improve reliability of PWM drive systems. Analysis, design equations, and experimental results on a 480-V 20-hp PWM drive system are presented. The filter configuration is an excellent candidate for many new and retrofit PWM 480-V/575-V drive systems.

Predicting the transient effects of PWM voltage waveform on the stator windings of random wound induction motors

In this paper, the effect of pulsewidth modulation (PWM) voltage waveform on the voltage distribution among the stator windings of random wound cage induction motors is studied. First, a method of estimating the high-frequency distributed-circuit parameters of the motor using finite-element analysis is described. From these parameters, an equivalent circuit is formed with the windings represented by partially distributed and partially lumped parameters. Using this equivalent circuit, the voltage distribution among the turns and coils of the motor are simulated using the SABER simulation package. Through simulation, the effect of rise time of the PWM wavefront on the voltage distribution is studied, and it is shown that the rise time of the wavefront has influence on the additional voltage stress on the line-end coil. In order to validate the simulation procedure adapted, the simulation results are compared with experimental results.

Design considerations for 12-pulse diode rectifier systems operating under voltage unbalance and pre-existing voltage distortion with some corrective measures

In this paper, design considerations for twelve-pulse diode rectifier systems operating under utility voltage unbalance and pre-existing harmonic voltage distortion are discussed. For a twelve-pulse diode rectifier system connected in parallel to feed a common DC link via an interphase transformer, it is shown that a small amount of impedance mismatch, utility voltage unbalance or pre-existing voltage distortion drastically affects the current sharing capability of the rectifier bridges. This, in turn, generates additional uncharacteristic and characteristic harmonics thereby increasing the THD. In order to mitigate these effects and ensure proper operation of diode rectifiers, specially designed line reactors termed harmonic blocking reactors (HBRs) are introduced. Analysis and design procedures for HBRs are discussed. Simulation results illustrate improved performance. Experimental results from a laboratory prototype system show close agreement with theory.

A new method to improve THD and reduce harmonics generated by a three phase diode rectifier type utility interface

In this paper, a new method to significantly improve the performance of a three phase diode rectifier type electric utility interface is proposed. The proposed method guarantees near sinusoidal input currents at unity power factor for varying load conditions. The method is effective in continuous as well as discontinuous operating modes of the diode rectifier. The scheme employs a zig-zag transformer along with a two switch PWM current controlled power converter to circulate a variable amplitude third harmonic current. The interconnecting zig-zag transformer virtually short circuits the zero sequence third harmonic current and also draws negligible 60 Hz currents from the input AC mains since there is no real power exchange. This method does not significantly alter the existing rectifier inverter hardware and the DC link voltage magnitude is unaltered. It is shown that the proposed approach is effective in discontinuous mode of the diode rectifier and in situations where the DC link inductor is absent such as in the front-end rectifier of an AC drive. Wide operating range and superior harmonic reduction ability are the main features of this scheme. Analysis, design, implementation, comparison and application aspects of this new active harmonic reduction scheme are discussed. Simulation and experimental results illustrate the effectiveness of the proposed method.<<ETX>>

New inverter output filter configuration reduces common mode and differential mode dv/dt at the motor terminals in PWM drive systems

In this paper, a new inverter output filter is proposed for PWM induction motor drive systems. The proposed filter is shown to effectively reduce both the differential mode and common mode dv/dt at the motor terminals even in the presence of long motor leads. Reducing differential mode dv/dt reduces overvoltages at the motor terminals and lowers the stress on the motor insulation. Lowering common mode dv/dt is shown to significantly reduce high frequency leakage currents to ground and induced shaft voltage in the motor. An important advantage of the proposed concept is that the filter can be installed within the inverter enclosure to achieve both differential mode and common mode dv/dt reductions at the motor terminals. Thus the use of the proposed filter can contribute to enhanced bearing life and improved reliability of PWM induction motor drive systems. Analysis, design equations and experimental results on a 480 V, 20 hp, PWM motor drive system are presented. The proposed filter configuration is an excellent candidate for many new and retrofit PWM motor drive systems.

Design considerations for 12/24-pulse auto-connected rectifiers for large VA, PWM drive systems

Auto-connected multipulse (12/24 pulse) rectifier schemes are cost-effective methods for reducing line current harmonics in PWM motor drive systems. Employing these schemes to enhance utility power quality requires careful attention to several design considerations. In particular: excursion of DC-link voltage at no load; effect of pre-existing voltage distortion; impedance mismatches; unequal diode drops on rectifier current sharing; and performance are fully analyzed. Several corrective measures to improve the performance of 12/24-pulse rectifier systems are also discussed. Finally, experimental results on a 460 V, 60 Hz, 400 kVA commercial ASD, retrofitted with 12/24 pulse rectifier systems, are discussed in detail.

Filtering techniques to minimize the effect of long motor leads on PWM inverter-fed AC motor drive systems

In this paper, filtering techniques are investigated to reduce the motor terminal overvoltage, ringing and dv/dt in inverter fed AC motor drive systems where long leads are required. Analysis is presented to show that the distributed L-C of a cable and the PWM inverter switching action lead to motor terminal voltage reflections and ringing that stress the turn insulation and contribute to bearing currents. First and second-order shunt filter designs are analyzed and compared. Detailed design equations to match the filter impedance to the cable surge impedance and to determine the filter component values are presented. It is demonstrated that a second-order shunt filter connected at the motor terminals greatly reduces the overvoltage stress and ringing, and also lowers the dv/dt of the PWM switching pulse. The filter design is shown to be solely dependent on the cable type (L/C ratio) and is independent of the cable length. Simulation and experimental results are presented to verify the proposed filter designs for 50 ft and 100 ft cable lengths.

Design considerations for six pulse and twelve pulse diode rectifier systems operating under voltage unbalance and pre-existing voltage distortion with some corrective measures

In this paper design considerations for six pulse and twelve pulse diode rectifier systems operating under utility voltage unbalance and pre-existing harmonic voltage distortion is discussed. For a six pulse diode rectifier system it is shown that voltage unbalance and pre-existing voltage distortion in the utility generates uncharacteristic harmonics in the line currents. The amplitude of these uncharacteristic harmonics are shown to be amplified if the diode rectifier is operating in discontinuous conduction mode. For a twelve pulse diode rectifier system connected in parallel to feed a common DC link via interphase reactor it is shown that a small amount of impedance mismatch, utility voltage unbalance or pre-existing voltage distortion drastically affects the current sharing capability of the rectifier bridges. This in turn generates additional uncharacteristic and characteristic harmonics thereby increasing the THD. In order to mitigate these effects and ensure proper operation of diode rectifiers, specially designed line reactors termed as harmonic blocking reactors (HBRs) are introduced The analysis and design procedure for the HBRs are discussed. Simulation results illustrate improved performance. Experimental results from a laboratory prototype system show close agreement with theory.

A method to reduce common mode and differential mode dv/dt at the motor terminals in PWM rectifier/PWM inverter type adjustable speed drive systems

In this paper, it is shown via analysis and experiments that common mode dv/dt transitions at motor terminals is twice as severe in a regenerative (PWM rectifier/PWM inverter) type ASD compared to a nonregenerative (diode rectifier/PWM inverter) type ASD system. It should be noted that higher common mode dv/dt at the motor terminals results in: (i) higher induced shaft voltage at each dv/dt transition, which can result in bearing currents and cause pitting/fluting of the bearings, and (ii) higher leakage currents to ground which can interfere with the plant zero sequence protection system. The paper proposes a method to reduce these effects. An input/output filter topology with interconnection to DC-link midpoint is proposed. This method reduces both common mode and differential mode dv/dt at the motor terminals, permits the use of long motor leads, and the filter components can be installed within the rectifier/inverter enclosure. Finally experimental results are presented on a 20 kW PWM ASD test stand.