D.-Y. Shih

High-speed signal propagation on lossy transmission lines

This paper addresses some of the problems encountered in propagating high-speed signals on lossy transmission lines encountered in high-performance computers. A technique is described for including frequency-dependent losses, such as skin effect and dielectric dispersion, in transmission line analyses. The disjoint group of available tools is brought together, and their relevance to the propagation of high-speed pulses in digital circuit applications is explained. Guidelines are given for different interconnection technologies to indicate where the onset of severe dispersion takes place. Experimental structures have been built and tested, and this paper reports on their electrical performance and demonstrates the agreement between measured data and waveforms derived from analysis. The paper addresses the problems found on lossy lines, such as reflections, rise-time slowdown, increased delay, attenuation, and crosstalk, and suggests methods for controlling these effects in order to maintain distortion-free propagation of high-speed signals.

Low-cost wafer bumping

As the demand for flip-chip interconnects mounts across an increasingly large spectrum of products and technologies, several wafer-bumping proeesses have been developed to produce the small solder features required for this interconnect technology. These processes differ signicantly in complexity and commensurate cost. Recently, a new bumping process developed at IBM Research called injection-molded solder, or IMS, has shown the capability to combine low-cost attributes with high-end capabilities. The development of IMS technology was driven by the need to reduce wafer-bumping costs while simultaneously addressing the conflicting needs of increasing wafer dimensions to 300 mm, decreasing bump and pitch dimensions below 75 µm on 150-µm centers, and optimal Pb-free alloy selection and processing. This paper describes IMS technology for both standard eutectic SnPb and Pb-free wafer bumping. Existing mainstream bumping technologies are also reviewed, with a focus on the challenges of new industry requirements. Early manufacturing challenges are addressed, including solutions that demonstrated the appropriateness of IMS technology for low-cost 300-mm Pb and Pb-free wafer bumping. Early process and reliability data are also reviewed.

Oxygen induced adhesion degradation at metal/polyimide interface

The role of oxygen in affecting the adhesive bonding at the metal/polyimide (polyimide‐on‐metal) interface has been studied. Both pyromellitic dianhydride (PMDA) ‐oxydianiline (ODA) and biphenyl‐tetracarboxylic dianhydride(BPDA) ‐p‐phenylene diamine (PDA) based poly(amic acid) precursors were cast and fully imidized on metal surfaces of Cr, Cu, Ni, Co, Cu/Ni, and Cu/Co in a nitrogen atmosphere. The peel strengths at the polyimide‐on‐metal interface were measured, using a 90° peel test, immediately after curing, and then remeasured after annealing in either nitrogen (N2−≤100 ppm O2 ) or air (N2 –21% O2 ) at 350 °C for 1 h. Very little or no change in peel strength was measured after these samples were annealed in nitrogen, while significant adhesion degradations were measured on all metals after annealing in air. The loss of polyimide (PI) adhesion to the Cu or Co surface is attributed to metal catalyzed thermal–oxidative degradation of the PI at the metal/PI interface, as characterized by polyimide thickn...

A novel elastomeric connector for packaging interconnections, testing and burn-in applications

Elasticon connectors have been developed for a wide variety of interconnection and test applications which include module-to-board, board-to-board interconnections; high density module, board and LCD testings; as well as chip/wafer testing and burn-in to produce Known-Good-Die. Depending on the applications, the Elasticon connectors can be fabricated into two basic types, the single-sided (integrated to a substrate) and the double-sided (interposer) structure. The single-sided structure, the Integrated Probe, is designed and fabricated for test and burn-in applications. The density, compliance, thickness, pattern and size of both the one- and two-sided structures can be easily tailored to meet the requirements of each specific application. The fabrication processes involve wire bonding, laser and polymer casting and curing. The electrical, mechanical and thermal properties of the connector have been fully characterized. To achieve high compliance with low contact force, a proprietary elastomeric material has been formulated to achieve not only high compliance but high thermal stability. The conductive element uses highly conductive, corrosion free, and oxidation resistant noble metals and their alloys. The reliability and durability of the elastomeric connector have been evaluated with mechanical cycling, thermal cycling, stress relaxation, outgassing, and temperature and humidity rest. The thermal stability of the connector, including both the polymer and the conductive element, has been measured to exceed the burn-in temperatures, which range from 125 to 180/spl deg/C.

Injection molded solder technology for Pb-free wafer bumping

A new wafer bumping technology is described that is especially suited for Pb-free applications. Although capable of using standard PbSn eutectic solder, IMS (injection molded solder) has been found to be especially suited for accommodating a wide range of Pb-free alloys with equal ease. The development of IMS technology was driven by the need to reduce wafer bumping costs while simultaneously addressing the conflicting demands of increasing wafer dimensions to 300 mm and decreasing bump and pitch dimensions below 75 /spl mu/m on 150 /spl mu/m centers. The IMS wafer bumping process uses a new head assembly that melts bulk solder alloys with precisely controlled compositions and dispenses the molten solder into multiple cavities of a wafer-sized mold plate. The mold plate is CTE matched to silicon and is reusable many times, thus reducing the per wafer bumping cost. In the process, a mold plate is scanned and filled with molten solder and inspected after solidification. Thereafter, the mold plate and device wafer are aligned and adjoined in a mirror image fashion for processing through a solder reflow furnace to transfer solder to the wafer. In this paper, early manufacturing challenges and solutions are described which allow IMS to be considered as an attractive technology for 300 mm Pb-free wafer bumping. Early process feasibility data for 200 mm wafer bumping are reviewed. Economical and environmental advantages are also discussed in relation to key process characteristics, such as solder waste reduction, use of low-cost bulk alloys, and others.

Fabrication and performance studies of multilayer polymer/metal interconnect structures for packaging applications

Multilayer copper/polyimide interconnect structures were fabricated using a reactive-ion-etching-based lift-off technique. Conductor cross-sectional area control, planarity, and a gap-free structure were made possible by the use of a novel siloxane-polyimide. The resultant structure consisted of two signal wiring layers between two ground planes with a nominal impedance of 40 Omega . Although redundant metallization processes were found to repair open lines, they resulted in an increase of the number of processing steps and could result in an increase of defects. Stud chain structures were found to survive cooling to 77 K with very little change in their characteristics, while heating of the copper interconnections to 350 degrees C in a reducing environment reduced their resistance by 3%.<<ETX>>

A new direction for elastomeric connectors

Elastomeric connectors are a relatively new technology compared with conventional connector systems. A wide variety of elastomeric connectors are available today to meet the interconnection requirements for many different electronic packaging applications. Multichip modules are one of the many applications that benefit from the high density interconnection capabilities of elastomeric connectors. The ELASTICON connector is a new high performance elastomeric connector that was developed to address some of the key limitations of existing MCM and land grid array connectors. The ELASTICON connector uses gold or gold alloy wires for the conductive elements embedded in an elastomer material. The size, shape and spacing along with the elastomer material properties can be tailored to specific application requirements. The processes that have been developed for fabricating the ELASTICON connector represent a new direction for elastomeric connector manufacturing. Besides LGA packaging applications, ELASTICON connectors can be used for board-to-board and cable-to-board interconnections as well as high density PCB and IC chip testing applications.<<ETX>>

Adhesion test standardization for multichip module packages

This paper summarizes the adhesion test standard and technique developed collectively by groups from the IBM Research Division, Yorktown Heights, and the Development Laboratory of IBM Microelectronics Division at East Fishkill. This activity was Initiated since the increased complexity of interconnection technologies require a large number of interfaces to maintain their integrity while being subjected to a large variety of processes. For example, reliable adhesion of polymer layers to metals and ceramics plays a vital role in several IBM key product technologies, such as the recently announced Glass-Ceramic Module multichip packaging technology used in the system 390/ES9000, models 820, 900 and 9021, computers and the Metallized Ceramic Polyimide (MCP) products. During the course of these product development cycles, it was noted that, sample preparation and measurement techniques can strongly affect the measured adhesion strength of a multi-component structure such as that found in multichip and multilayer modules. As a result of the observed variability in a multitude of adhesion measurements from many IBM laboratories, it was decided that standardization of the sample preparation and adhesion measurement techniques was required. During the course of collective work between a large number of participants, it became clear, that once a certain number of rules are followed, data collected from different workers can be compared. These rules form the basis of the peel standard which is discussed here. Once the standard measurement of adhesion is implemented, various adhesion promotion techniques can be directly compared, which lead to a swift and facile improvement in the reliability of products and in their development cycle time.

Polyimide stress cushion for multichip glass-ceramic module packaging

The performance of the IBM glass ceramic-copper multilayer ceramic module (MLC) is significantly enhanced by a revolutionary set of packaging materials. Low dielectric constant cordierite glass ceramic (/spl epsiv/-5.0), co-sintered with high conductivity copper (/spl rho/-3.5 /spl mu//spl Omega/-cm), was developed and integrated into the high performance glass ceramic thermal conduction modules (TCM) used in the IBM System/390-Enterprise system/9000 series of mainframe computers. Low stress pin attach structures have been developed for the glass ceramic module. They include the multilayer thin film I/O pad, taper headed pin and polyimide-cushioned pin structure. All of the approaches were shown to reduce the pin joint stress significantly and, as a consequence, led to the construction of a robust pin joint that is fully compatible with the glass ceramic substrate.

Factors affecting the interconnection resistance and yield in the fabrication of multilayer polyimide/metal thin film structures

The use of a lift-off technique to fabricate a high-density structure consisting of multiple layers of metal/polyimide thin film structure on a silicon substrate is described. To achieve better performance and high yield, the authors evaluated the process design, the processing parameters, and the thickness of the Cr/Cu/Cr metallurgy, along with the use of suitable polyimide dielectrics. The plasma processing conditions, the types of passivation metals on Cu, and the use of a siloxane-polyimide as the gap-fill etch-stop material were all shown to play a very critical role in affecting the interconnection resistance and yield of the multilayer thin film structures. By optimizing these parameters the feasibility of fabricating high-density thin film wiring layers with good yield is demonstrated.<<ETX>>