Daizo Andoh

Interconnection technique of ALIVH/sup (R)/ substrate

The unique interconnection using conductive paste of the ALIVH/sup (R)/ (any layer interstitial via hole) substrate, especially its structure, was studied. Calculations and SEM images suggested the existence of metallic bonding between copper particles and between copper particles and copper foil. By assuming that metallic bonds exist, interconnection resistance variation with temperature could be explained. We also studied a considerable number of factors for obtaining strong interconnection. As a consequence, the compression and the binder system of the conductive paste play important roles in achieving strong interconnection.

The progress of the ALIVH substrate

The next generation ALIVH substrates were developed named ALIVH G-type for the motherboard use and ALIVH-FB for semiconductor package use. The ALIVH G-type has lower moisture absorption and higher rigidity than the conventional ALIVH. The insulator material of conventional ALIVH is a non-woven aramid-epoxy prepreg. On the other hand, the ALIVH G-type uses glass-epoxy prepreg. We developed the resin flow control technology during the hot press lamination process for hindering the conductive particle in the via paste diffusion. We expect to realize the halogen free ALIVH and liberate the ALIVH from the moisture control, using the glass-epoxy prepreg. The ALIVH-FB has the same structure as the ALIVH. The design rule is minimised for the semiconductor package. The design rule of ALIVH-FB is Line/Space=25/25 /spl mu/m and Via Diameter/Land Diameter=50/150 /spl mu/m. The ALIVH-FB uses three new technologies of: (1) film insulator; (2) YAG THG laser drilling process; and (3) accurate alignment process. The ALIVH-FB is very suitable for semiconductor package use by the fine via on via structure and the properties of the film insulator.

Next generation ALIVH substrate for bare chip direct mounting

The next generation ALIVH(R) substrate named ALIVH(R)-FB substrate was developed. The ALIVH-FB substrate has a structure that fine layers were formed on the surface of the conventional ALIVH substrate. The design rule of the core layer is Line/Space (LIS)=50/50 /spl mu/m, Via hole diameter/Land diameter (V/L)=120/250 /spl mu/m and the rule of fine layer is L/S=25/25 /spl mu/m, V/L=50/150 /spl mu/m. Three technologies are developed: thin insulator layer by the film material with high heat resistance; fine via hole drilling process by the YAG THG laser and fine interconnection technology using conductive copper paste; and fine layer fabrication by the transfer process. The technologies display the following features: high wiring density by the Fine Via on Via structure; film insulator with high heat resistance and low CTE for a high reliability joint between the bare chip and the substrate; good impedance control for the high frequency circuit; and a flat surface and high heat resistance for the bare chip mounting. The ALIVH-FB substrate is very suitable for the high pin count bare chip direct mounting.