Dalvir K. Saini
Wright State University
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Featured researches published by Dalvir K. Saini.
conference of the industrial electronics society | 2016
Agasthya Ayachit; Dalvir K. Saini; Marian K. Kazimierczuk; Alberto Reatti
This paper presents the following for a Class-E zero-voltage switching (ZVS) power amplifier: (a) design of the choke inductor and (b) theoretical estimation of power losses in the core and a solid round winding. The expressions required to design the core using the Area-Product (Ap) method are provided. The equations for the dc resistance, ac resistance at high frequencies, and dc and ac power losses are provided for the solid round winding. A Class-E ZVS power amplifier with practical specifications is considered. A core with air gap is selected since the choke inductor carries a dc current in addition to the ac component. The gapped core power loss density and power loss are estimated using Steinmetz empirical equation. Simulation results showing the transient analysis and Fourier analysis are given. It is shown that, for the given design, the winding power loss due to the fundamental component is dominant and that due to higher order harmonics can be neglected. In addition, it is also proven that the power loss caused by the dc current component is higher than that by the ac current component, which can be neglected.
conference of the industrial electronics society | 2016
Fabio Corti; Francesco Grasso; Alberto Reatti; Agasthya Ayachit; Dalvir K. Saini; Marian K. Kazimierczuk
The design of Class-E zero-voltage switching (ZVS) inverter with a loosely-coupled transformer is introduced in this paper. In the presented approach, the magnetizing and leakage inductances of the transformer are absorbed into the main circuit. The synthesis of the transformer-version of Class-E ZVS inverter into its equivalent π2a topology is presented. The π2a topology improves the range of the optimum load resistance required to achieve ZVS. An example of the Class-E inverter with dc supply voltage 10 V, output power 10 W, switching frequency 100 kHz and at a coupling coefficient of 0.77 is considered. The inverter is designed to achieve both zero-voltage switching (ZVS) and zero derivative switching (ZDS) conditions. The analytical expressions are validated through simulation results for an optimum coupling coefficient of 0.77. In view of potential misalignment between the primary and secondary coils, simulation results are provided for coupling coefficients, which are lower and higher than the optimum value. It is shown that both ZVS and ZDS can be achieved at a coupling coefficient lower than the optimum value and is not possible to achieve ZVS at a coupling coefficient higher than the optimum value. Overall efficiency of 94.3% is achieved at a coupling coefficient of 0.77, 93.4% at 0.85, and 92.12% at 0.7. The presented approach can be used for transformers with reactive load impedances also.
conference of the industrial electronics society | 2016
Dalvir K. Saini; Alberto Reatti; Marian K. Kazimierczuk
This paper proposes a technique to track and regulate the “true average” current in any branch of a pulse-width modulated dc-dc power converter. An example buck converter in continuous-conduction mode is considered. A comprehensive characterization is presented for the proposed scheme. An overall dc and small-signal analysis of the inner current loop is performed. The current average current-mode control methods suffer from switching instability at low duty ratios due to a large ripple in the sensed current. Moreover, the current error amplifiers high-frequency pole located at the switching frequency neither alleviates the stability issue nor improves the dynamic response of the converter. In the proposed approach, a low-pass filter, which attenuates any high-frequency ripple is placed in the feedback path of the current loop. Consequently, the control voltage is nearly dc and proportional to the actual average value of the inductor current. The inner current loop gain transfer function of the presented circuit has been derived. The following critical path closed-loop transfer functions have been derived: reference voltage-to-inductor current and reference voltage-to-output voltage. Using practical specifications of a buck dc-dc converter, a theoretical framework to design the inner loop is presented. Verification of the theoretically predicted transfer functions and transient analysis is performed through simulations.
international midwest symposium on circuits and systems | 2015
Agasthya Ayachit; Dalvir K. Saini; Marian K. Kazimierczuk
This paper presents an analysis of the two-phase buck converter functioning as a dynamic power supply for Class-DE radio-frequency (RF) power amplifier (PA). The equations necessary to design the buck converter providing an ac output voltage with a dc offset is presented. It is shown that the maximum inductor current ripple in the buck converter occurs when the output voltage is at its nominal value. Consequently, the expression for the minimum value of the inductance as a function of efficiency needed for the converter to operate in continuous-conduction mode is derived. Additionally, the necessary equations needed to design the Class-DE RFPA are provided. A design example of a two-phase buck dc-ac converter with Class-DE RFPA as a dynamic load is considered. Simulation results are presented to validate the theoretical results.
conference of the industrial electronics society | 2015
Dalvir K. Saini; Agasthya Ayachit; Marian K. Kazimierczuk; Tadashi Suetsugu
This paper presents a small-signal analysis of the pulse-width modulated (PWM) boost dc-dc converters operating in continuous-conduction mode (CCM) and subject to complex impedance load. Using the existing knowledge on the small-signal model of the boost converter obtained through the circuit averaging approach, this paper presents an extended analysis of the small-signal transfer functions, under the influence of resistive and inductive load impedances. The expressions for the control-to-output, input-to-output voltage transfer functions, and the output impedance of the boost converter operating in CCM are derived. The characteristics of these transfer functions are analyzed and the effect of the added inductance on the location of poles and zeros is discussed. It is shown that the inherent right-half plane (RHP) zero shifts to the left-half of the s-plane, when the load inductance is increased beyond a specific value. The theoretical results are validated by simulations of a boost converter with suitable design specifications.
Iet Circuits Devices & Systems | 2018
Agasthya Ayachit; Dalvir K. Saini; Marian K. Kazimierczuk
This study presents the design and experimental characterisation of single-layer solenoid air-core inductors. The analytical expressions for the winding inductance, self-capacitance, and winding resistance are derived. The inductor properties are analysed up to the first self-resonant frequency. The procedure to design air-core inductors for high-frequency (HF) applications is provided. Experimental validations of the analytical equations are given. A single-layer air-core 20 μ H inductor was designed, built, and measured. The bandwidth of the designed inductor obtained from theoretical predictions was about 100 MHz. The measured quality factor was 181 at 1 MHz. The results of this study are useful for engineers and designers in the areas of power supplies, datacentres, radio-frequency power amplifiers, radio-frequency transmitters, and HF filters.
international midwest symposium on circuits and systems | 2017
Dalvir K. Saini; Agasthya Ayachit; Thomas Salvatierra; Marian K. Kazimierczuk
This paper presents the design of a zero-voltage-ripple (ZVR) buck dc-dc converter. The circuit uses an autotransformer for ripple cancellation in the output voltage. The principle of operation is discussed in brief. The relationship between the currents through the magnetizing inductance and the auto-transformer windings is developed. The auxiliary inductance for ripple cancellation in series with the secondary winding is determined. The expression for the auxiliary inductance is derived. A laboratory prototype of a buck converter with supply voltage 12 V, output voltage voltage 5 V, switching frequency 500 kHz, and output power 10 W was built. Simulation and experimental results are provided validating the theoretical predictions.
international midwest symposium on circuits and systems | 2017
Thomas Salvatierra; Agasthya Ayachit; Dalvir K. Saini; Marian K. Kazimierczuk
This paper presents a method for calculating the semiconductor losses in asynchronous and synchronous PWM buck converters when operated as a fixed-VI, fixed-RL, variable-Vo dynamic power supply. Equations are derived for MOSFET switching and conduction losses in both circuits, as well as diode conduction and forward-voltage losses. This work also compares the two topologies from the perspective of semiconductor losses to determine which circuit is inherently more efficient. The low-side MOSFET of the synchronous converter is shown via analysis and simulation to contribute the most significant power loss, thus demonstrating the asynchronous dc-ac converter topology is generally more efficient if designs are otherwise comparable.
international midwest symposium on circuits and systems | 2017
Dalvir K. Saini; Marian K. Kazimierczuk
The audio-susceptibility of the average current-mode controlled buck dc-dc converter in continuous-conduction mode is presented in this paper. The average current-mode control scheme used in this paper regulates the true average component of the sensed inductor current and is not affected by a high inductor current ripple at low duty ratios. The principle of negative feedback for converters with the average current-mode control is discussed in brief. The input voltage-to-inductor current disturbance transfer function is derived using the averaged, linear small-signal model. The loop gain transfer function has been analyzed to satisfy the closed-loop requirements. The closed-inner-loop input voltage-to-inductor current transfer function and the closed-inner-loop input-to-output voltage transfer functions are determined. An example buck converter is used and the characteristics are analyzed in detail. Simulation results are presented for the designed buck converter validating the theoretical predictions.
ieee industry applications society annual meeting | 2017
Dalvir K. Saini; Agasthya Ayachit; Marian K. Kazimierczuk; Tadashi Suetsugu
This paper aims at achieving the following objectives: (a) evaluate and compare the power loss during switching transitions in the gallium nitride (GaN) FETs and silicon (Si) MOSFETs, (b) determine the frequency capability of the GaN and Si transistors, when used in hard-switching power electronic circuits, and (c) evaluate the power-performance of the synchronous buck (SB) dc-dc power converters employing GaN and Si transistors operating at different switching frequencies. The GaN transistors in EPC9037 switching network module are considered as the benchmark devices and their properties are compared with the silicon n-channel transistors with identical voltage and current ratings. Simulation results are provided for the SB converter illustrating the switching frequency limitation of the Si MOSFETs and the extended frequency capability of GaN FETS. Experimental results are provided to validate the analytical predictions.