Damien Deleruyelle

Experimental and theoretical study of electrode effects in HfO 2 based RRAM

In this work, the impact of Ti electrodes on the electrical behaviour of HfO2-based RRAM devices is conclusively clarified. To this aim, devices with Pt, TiN and Ti electrodes have been fabricated (see Fig. 1). We first provide several experiments to clearly demonstrate that switching is driven by creation-disruption of a conductive filament. Thus, the role of TiN/Ti electrodes is explained and modeled based on the presence of HfOx interfacial layer underneath the electrode. In addition, Ti is found responsible to activate bipolar switching. Moreover, it strongly reduces forming and switching voltages with respect to Pt-Pt devices. Finally, it positively impacts on retention. To support and interpret our results we provide physico-chemical measurements, electrical characterization, ab-initio calculations and modeling.

Self-consistent physical modeling of set/reset operations in unipolar resistive-switching memories

This Letter deals with a self-consistent physical model for set/reset operations involved in unipolar resistive switching memories integrating a transition metal oxide. In this model, set operation is described in terms of a local electrochemical reduction of the oxide leading to the formation of metallic conductive filaments. Beside, reset operation relies on the thermally assisted destruction of the formed metallic filaments by Joule heating effect. An excellent agreement is demonstrated with numerous published experimental data suggesting that this model can be confidently implemented into circuit simulators for design purpose.

Synchronous Non-Volatile Logic Gate Design Based on Resistive Switching Memories

Emerging non-volatile memories (NVM) based on resistive switching mechanism (RS) such as STT-MRAM, OxRRAM and CBRAM etc., are under intense R&D investigation by both academics and industries. They provide high write/read speed, low power and good endurance (e.g., > 1012) beyond mainstream NVMs, which allow them to be embedded directly with logic units for computing purpose. This integration could increase significantly the power/die area efficiency, and then overcome definitively the power/speed bottlenecks of modern VLSIs. This paper presents firstly a theoretical investigation of synchronous NV logic gates based on RS memories (RS-NVL). Special design techniques and strategies are proposed to optimize the structure according to different resistive characteristics of NVMs. To validate this study, we simulated a non-volatile full-adder (NVFA) with two types of NVMs: STT-MRAM and OxRRAM by using CMOS 40 nm design kit and compact models, which includes related physics and experimental parameters. They show interesting power, speed and area gain compared with synchronized CMOS FA while keeping good reliability.

Robust Compact Model for Bipolar Oxide-Based Resistive Switching Memories

Emerging nonvolatile memories based on resistive switching mechanisms pull intense research and development efforts from both academia and industry. Oxide-based resistive random access memories (OxRAM) gather noteworthy performances, such as fast WRITE/READ speed, low power, high endurance, and large integration density that outperform conventional flash memories. To fully explore new design concepts, such as distributed memory in logic or biomimetic architectures, robust OxRAM compact models must be developed and implemented into electrical simulators to assess performances at a circuit level. In this paper, we propose a physics-based compact model used in electrical simulator for bipolar OxRAM memories. After uncovering the theoretical background and the set of relevant physical parameters, this model is confronted to experimental electrical data. The excellent agreement with these data suggests that this model can be confidently implemented into circuit simulators for design purpose.

Degradation of floating-gate memory reliability by few electron phenomena

The purpose of this paper is to give a quantitative evaluation of the intrinsic reliability limits of floating-gate (FG) memories in the decananometer range due to the reduction of collective phenomena and to the dominance of single-electron stochastic behaviors. To this end, first, a model that quantitatively predicts the intrinsic dispersions of the memory retention time and programming window is proposed. Second, experimental results obtained on ultrascaled memory devices (with an active area as small as 30 nm times 30 nm) with either a continuous poly-Si FG or silicon nanocrystals will be shown and used to validate this model. Finally, extrapolations on the intrinsic reliability limits of future generations of Flash memories will be done

Impact of few electron phenomena on floating-gate memory reliability

In this paper we give a quantitative evaluation of the intrinsic reliability limits of floating gate (FG) memories in the deca-nanometer range, due to the reduction of collective phenomena and to the dominance of single electron stochastic behaviours. A new model that quantitatively predicts the intrinsic dispersions of the memory retention time and programming window is proposed. Experimental results obtained on ultra-scaled memory devices (down to 30nm /spl times/ 30nm), with either continuous poly-Si or Si-nanocrystal FG, are also presented. Finally, extrapolations on the intrinsic reliability limits of future generations of Flash memories are done.

Resistance controllability and variability improvement in a TaOx-based resistive memory for multilevel storage application

In order to obtain reliable multilevel cell (MLC) characteristics, resistance controllability between the different resistance levels is required especially in resistive random access memory (RRAM), which is prone to resistance variability mainly due to its intrinsic random nature of defect generation and filament formation. In this study, we have thoroughly investigated the multilevel resistance variability in a TaOx-based nanoscale (<30 nm) RRAM operated in MLC mode. It is found that the resistance variability not only depends on the conductive filament size but also is a strong function of oxygen vacancy concentration in it. Based on the gained insights through experimental observations and simulation, it is suggested that forming thinner but denser conductive filament may greatly improve the temporal resistance variability even at low operation current despite the inherent stochastic nature of resistance switching process.

Switching of nanosized filaments in NiO by conductive atomic force microscopy

Resistive switching in binary metal oxides consists of conductivity changes originating from the electrical creation/dissolution of conductive filaments (CFs) at nanoscale. The investigation of CF local properties can only be achieved through physical and electrical studies at the scale of 10 nm or less, that is, the characteristic size of CFs. This work reports on the direct manipulation of individual CFs formed through insulating NiO films by conductive atomic force microscopy (CAFM) and the comparison between forming/reset processes induced by CAFM and those observed in large-area devices with the same NiO film. The switching variability due to local defects, such as grain boundaries and dislocations, is directly evidenced by CAFM during electroforming process. Our results also indicate that the forming voltage under CAFM can be significantly smaller than the one observed in large-area devices, thus providing evidence for the electric-field enhancement underneath the CAFM tip. Filament deactivation, or...

Electrical nanocharacterization of copper tetracyanoquinodimethane layers dedicated to resistive random access memories

The local electrical properties of copper tetracyanoquinodimethane (CuTCNQ)/HfO2/Pt stacks were investigated thanks to conductive-atomic force microscopy (AFM) measurements. Local I-V and I-t spectroscopy evidenced repeatable and reversible bipolar electrical switching (SET and RESET operations) at the nanometer scale beneath the AFM tip. Experimental results suggest that resistive switching is due to the creation/dissolution of conductive filaments bridging the CuTCNQ surface to the AFM tip. A physical model based on the migration of Cu+ ions within a nanogap and the growth of a conductive filament shows an excellent agreement with the experimental results during SET operation achieved at nanoscale.

Investigation of the potentialities of Vertical Resistive RAM (VRRAM) for neuromorphic applications

Combining Resistive RAM concept with Vertical NAND technology and design, Vertical RRAM (VRRAM) was recently proposed as a cost-effective and extensible technology for future mass data storage applications [1]. 3D RRAM based neural networks were also proposed to emulate the potentiation and depression of a synapse [2], but more complex circuits were not discussed. In previous works [3-4], various RRAM based neuromorphic circuits were proposed and investigated, using planar devices.