Daniël Paulusma

Run-time mapping of applications to a heterogeneous reconfigurable tiled system on chip architecture

This work evaluates an algorithm that maps a number of communicating processes to a heterogeneous tiled system on chip (SoC) architecture at run-time. The mapping algorithm minimizes the total amount of energy consumption, while still providing an adequate quality of service (QoS). A realistic example is mapped using this algorithm.

A survey on the computational complexity of coloring graphs with forbidden subgraphs.

For a positive integer

A complete complexity classification of the role assignment problem

k

Three Complexity Results on Coloring Pk-Free Graphs

, a

Covering graphs with few complete bipartite subgraphs

k

Solutions for the stable roommates problem with payments.

-colouring of a graph

Clique-Width of Graph Classes Defined by Two Forbidden Induced Subgraphs

G=(V,E)

A new characterization of P6-free graphs

is a mapping

The new FIFA rules are hard: complexity aspects of sports competitions

c: V\rightarrow\{1,2,...,k\}

Obtaining planarity by contracting few edges

such that