Daniel Weise

Programmable syntax macros

Lisp has shown that a programmable syntax macro system acts as an adjunct to the compiler that gives the programmer important and powerful abstraction facilities not provided by the language. Unlike simple token substitution macros, such as are provided by CPP (the C preprocessor), syntax macros operate on Abstract Syntax Trees (ASTs). Programmable syntax macro systems have not yet been developed for syntactically rich languages such as C because rich concrete syntax requires the manual construction of syntactically valid program fragments, which is a tedious, difficult, and error prone process. Also, using two languages, one for writing the program, and one for writing macros, is another source of complexity. This research solves these problems by having the macro language be a minimal extension of the programming language, by introducing explicit code template operators into the macro language, and by using a type system to guarantee, at macro definition time, that all macros and macro functions only produce syntactically valid program fragments. The code template operators make the language context sensitive, which requires changes to the parser. The parser must perform type analysis in order to parse macro definitions, or to parse user code that invokes macros.

Value dependence graphs: representation without taxation

The value dependence graph (VDG) is a sparse dataflow-like representation that simplifies program analysis and transformation. It is a functional representation that represents control flow as data flow and makes explicit all machine quantities, such as stores and I/O channels. We are developing a compiler that builds a VDG representing a program, analyzes and transforms the VDG, then produces a control flow graph (CFG) [ASU86] from the optimized VDG. This framework simplifies transformations and improves upon several published results. For example, it enables more powerful code motion than [CLZ86, FOW87], eliminates as many redundancies as [AWZ88, RWZ88] (except for redundant loops), and provides important information to the code scheduler [BR91]. We exhibit a fast, one-pass method for elimination of partial redundancies that never performs redundant code motion [KFS92, DS93] and is simpler than the classical [MR79, Dha91] or SSA [RWZ88] methods. These results accrue from eliminating the CFG from the analysis/transformation phases and using demand dependences in preference to control dependences.

Compiling scientific code using partial evaluation

The partial evaluation approach, which transforms a high-level program into a low-level program that is specialized for a particular application, exposing the parallelism inherent in the underlying numerical computation, is discussed. A prototype compiler that uses partial evaluation is described. Experiments with the compiler have shown that for an important class of numerical programs, partial evaluation can provide marked performance improvements: speedups over conventionally compiled code that range from seven times faster to 91 times faster have been measured. By coupling partial evaluation with parallel scheduling techniques, the low-level parallelism inherent in a computation can be exploited on heavily pipelined or parallel architectures. The approach has been demonstrated by applying a parallel scheduler to a partially evaluated program that simulates the motion of a nine-body solar system.<<ETX>>

Automatic online partial evaluation

We have solved the problem of constructing a fully automatic online program specializer for an untyped functional language (specifically, the functional subset of Scheme). We designed our specializer, called Fuse, as an interpreter that returns a trace of suspended computations. The trace is represented as a graph, rather than as program text, and each suspended computation indicates the type of its result. A separate process translates the graph into a particular programming language. Producing graphs rather than program text solves problems with code duplication and premature reduce/residualize decisions. Fuses termination strategy, which employs online generalization, specializes conditional recursive function calls, and unfolds all other calls. This strategy is shown to be both powerful and safe.

Continuing into the future: on the interaction of futures and first-class continuations

One of the nicest features of the future construct originally presented in Multilisp [2] is its near orthogonality with respect to a functional subset of Scheme [1]. Introducing futures into most functional programs does not affect the value returned, even though the parallel execution order might differ from the sequential. When futures and continuations are used in the same program, however, parallel and sequential executions can yield different results. No existing implementation of futures has yet addressed this issue. We make futures and continuations interact properly through a simple, yet important, change to the implementation of the future construct. This change causes a second problem to manifest itself: the creation of extraneous computation threads. The second problem is addressed by making an additional change to the future construct.

Automatic generation of compiled simulations through program specialization

Using a program specializer, we automatically generated high-performance digital simulation algorithms from a simple interpreter-based simulator. By making simple changes in the simulator and the specializer, we generated four types of compiled simulations: the PC-set algorithm, an improvement on the PC-set algorithm, and two compiled versions of the BACKSIM algorithm. An analysis of our experiments indicate that large improvements to the PC-set method are possible, and that compiled simulation based on the pure BACKSIM algorithm should not be further investigated as the overhead of the algorithm is larger than the time it saves by pruning gate evaluations.

On time versus space III

Paul and Reischuk devised space efficient simulations of logarithmic cost random access machines and multidimensional Turing machines. We simplify their general space reduction technique and extend it to other computational models, including pointer machines, which model computations on graphs and data structures. Every pointer machine of time complexityT(n) can be simulated by a pointer machine of space complexityO(T(n)/logT(n)).

Functional Verification of MOS Circuits

This report describes the ideas behind Silica Pithecus, a program which verifies synchronous digital MOS VLSI circuits. Silica Pithecus accepts the schematic of an MOS VLSI circuit, declarations of the logical relationships between the inputs signals (e.g., which inputs are mutually exclusive), and a specification of the intended digital behavior of the circuit. If the circuit fails to meet its specification Silica Pithecus returns to the designer the precise reason it fails to do so. Unlike previous verification systems, Silica Pithecus employs a realistic electrical model. It also automatically generates the constraints on the inputs of a circuit which ensure the circuit will exhibit its intended digital behavior. These constraints are necessary for hierarchical verification. Silica Pithecus operates hierarchically, interactively, and incrementally.

Multilevel verification of MOS circuits

The ideas behind Silica Pithecus, a program for verifying synchronous digital MOS VLSI circuits, are described. Silica Pithecus accepts the schematic of an MOS VLSI circuit, declarations of the logical relationships between the input signals, and a specification of the intended digital behavior of the circuit. If the circuit fails to meet its specification, Silica Pithecus returns to the designer the reason it fails to do so. Unlike previous verification systems, which used digital models of MOS components, Silica Pithecus employs a realistic electrical model. It operates hierarchically, interactively, and incrementally. The key idea is to generate and use constraints for verification. Constraints are predicates that restrict the input signals a circuit accepts. Employing explicit constraints has many benefits. First, they enable hierarchical verification, which allows large circuits to be verified. Second, errors can be pinpointed and explained to the designer. Third, all constraints (at the electrical level) can be algorithmically and automatically generated. >

Constraints, Abstraction and Verification

Circuits are not designed to work in all environments: a contract exists between a circuit and the environments in which it correctly operates. The contract is specified by constraints, predicates that must be satisfied by the inputs supplied to the circuit by its environment. A verifier employs contraints during verification to ignore behaviors that will not arise. This paper systematically investigates constraints. We show that: the standard verification condition needs to be revamped to avoid technical and philosophical problems; that there are two important classes of constraints; that one of these classes can be automatically generated; and that constraints arise from an interaction between models and abstractions.