Danny Scheffer

A logarithmic response CMOS image sensor with on-chip calibration

CMOS image sensors with logarithmic response are attractive devices for applications where a high dynamic range is required. Their strong point is the high dynamic range. Their weak point is the sensitivity to pixel parameter variations introduced during fabrication. This gives rise to a considerable fixed pattern noise (FPN) that deteriorates the image quality unless pixel calibration is used. In the present work a technique to remove the FPN by employing on-chip calibration is introduced, where the effect of threshold voltage variations in pixels is cancelled. An image sensor based on an active pixel structure with five transistors has been designed, fabricated, and tested. The sensor consists of 525/spl times/525 pixels measuring 7.5 /spl mu/m/spl times/10 /spl mu/m, and is fabricated in a 0.5-/spl mu/m CMOS process. The measured dynamic range is 120 dB while the FPN is 2.5% of the output signal range.

Random addressable active pixel image sensors

In this article we discuss the trade-offs for the design, fabrication and interfacing of fast pixel addressable (random-access) cameras. In order to benefit most from the random addressability, the interface must be optimized for access through a data bus/address bus structure. Measures to correct the cameras inherent non-uniformity must not slow down the interface speed.

A retina-like CMOS sensor and its applications

This paper describes the implementation in silicon of a retina-like sensor characterized by a space-variant resolution similar to that of the human retina. Besides the actual implementation using CMOS technology, the design peculiarities of retina-like sensors are compared with the use of software or hardware electronic remappers. The paper also describes the realization of a retina-like digital camera and its applications for real-time control and image transmission.

CMOS active pixel image sensor with CCD performance

A color CMOS image sensor has been developed which meets the performance of mainstream CCDs. The pixel combines a high fill factor with a low diode capacitance. This yields a high light sensitivity, expressed by the conversion gain of 9 (mu) V/electron and the quantum efficiency fill factor product of 28 percent. The temporal noise is 63 electrons, and the dynamic range is 67 dB. An offset compensation circuit in the column amplifiers limits the peak-to-peak fixed pattern noise to 0.15 percent of the saturation voltage.

CMOS foveated image sensor: signal scaling and small geometry effects

A new foveated (log-polar) image sensor using standard CMOS technology has been designed and fabricated. The pixel distribution follows the log polar transform having more resolution in the center than in the periphery. For the fovea or central part, a different but also polar distribution has been adopted to fit the inner pixels. The particular problem of foveated image sensors is the signal scaling; pixels at different positions are different sizes and therefore different signal responses to the same illumination level. The difference among pixel responses is not only due to the differences among sensitive areas, but also to the differences among transistor channel sizes that, for submicron technologies, become a nonlinear problem. Some solutions for the signal scaling, small geometry effects (especially narrow-channel effects), and foveated structure, have been analyzed and successfully adopted for the presented sensor. The election of the CMOS process, instead of the CCD, is also discussed and analyzed.

Space-variant nonorthogonal structure CMOS image sensor design

A CMOS log-polar image sensor has been designed and fabricated. As a result, a systematic approach has been proposed to design space-variant sensors and layouts. The pixels in this sensor are distributed in a polar fashion; the image plane consists of concentric rings containing the elementary sensing cells. Such a structure, where polygons use any space orientation, does not match very well with current design tools and CMOS fabrication processes. An approach to design nonorthogonal repetitive structures using standard fabrication processes and computer-aided design (CAD) tools is presented. The result of this work is an image sensor, with log-polar structure, suitable for image processing since the log-polar mapping has interesting mathematical and image data reduction properties.

Response properties of a foveated space-variant CMOS image sensor

A new foveated CMOS image sensor has been designed and fabricated. The photocell elements transform the light into current, and then, in a continuous way, into voltage without charge integration. This kind of sensing cell has been already employed in image sensors for normal cameras, but never in foveated sensors. The presented sensor tries to emulate the human eye pixel resulting in a sensor with a space variant distribution of pixels. Consequences of this distribution are the different size of the sensing elements in the pixel matrix, the non orthogonal shapes of the different elements that integrate the pixel, and, as a result, the different response of every cell in the sensor. A scaling mechanism is needed due to the different pixel size from circumference to circumference. A mechanism for current scaling is presented. This mechanism has been studied along with other effects, as the narrow channel effect on submicron MOS transistors, and the influence of the logarithmic response of these special kinds of sensing cells. The chip has been fabricated using standard 0.7 /spl mu/m CMOS technology.

Project SVAVISCA: a space-variant color CMOS sensor

The paper describes the result of the first phase of the ESPRIT LTR project SVAVISCA. The aim of the project was to add color capabilities to a previously developed monochromatic version of a retina-like CMOS sensor. In such sensor, the photosites are arranged in concentric rings and with a size varying linearly with the distance from the geometric center. Two different technologies were investigated: 1) the use of Ferroelectric Liquid Crystal filters in front of the lens, 2) the deposition of color microfilters on the surface of the chip itself. The main conclusion is that the solution based on microdeposited filters is preferable in terms of both color quality and frame rate. The paper will describe in more detail the design procedures and the test results obtained.

Real-time, miniaturized optical sensor for motion estimation and time-to-crash detection

The paper presents a low cost, miniature sensor that is able to compute in real time (up to 1000 frames/sec) motion parameters like the degree of translation, expansion or rotation that is present in the observed scene, as well as the so-called time-to-crash (TTC), that is the time required for a moving object to collide with the sensor. The sensing principle is that of computing and analyzing the optical flow projected by the scene on the sensor focal plane, through a novel algorithmic technique, based on sparse sampling of the image and one-dimensional correlation. The hardware implementation of the algorithm is based on two custom VLSI chips: one is a CMOS image sensor, having nonstandard pixel geometry, while the other one is a digital correlator that computes at high speed the optical flow vectors. The high-level control and communication tasks are managed by a microcontroller, thus guaranteeing a high level of flexibility and adaptability of the sensor properties towards different application requirements and/or variable external conditions.

Design issues on CMOS space-variant image sensors

A new image sensor, using CMOS technology, has been designed and fabricated. The pixel distribution of this sensor follows a log-polar mapping, thus the pixel concentration is maximum at the center reducing the number of pixels towards the periphery, having a resolution of 56 rings with 128 pixels per ring. The design of this kind of sensors has special issues regarding the space-variant nature of the pixel distribution. The main topic is the different pixel size that requires scaling mechanisms to achieve the same output independently of the pixel size. This paper presents some study results on the scaling mechanisms of this kind of sensors. A mechanism for current scaling is presented. This mechanism has been studied along with the logarithmic response of these special kind of sensing cells. The chip has been fabricated using standard 0.7 micrometer CMOS technology.